my123

45 ms·

601.
by my123 5y ago
> You can combine it all in a chip like the Apple T2 and then you would have to somehow probe the silicon For the T2, at least macOS uses a key derived from useryou need both chip control _and_ user password to get in) Windows does not,
602.
by my123 5y ago
I don’t see why you’d want that, but if you want to do it you can. nvptx64-nvidia-cuda is a Tier 2 Rust target. (see https://doc.rust-lang.org/nightly/rustc/platform-support.htm... )
603.
by my123 5y ago
These are not proper pointers, see: https://github.com/google/clspv/blob/master/docs/OpenCLCOnVu... > Pointers are an abstract type - they have no known compile-time size. Using a pointer type as
604.
by my123 5y ago
You share the same pointers between CPU and GPU. Pointers in structures for example are one of the use cases. Also as an even more unique option, see cudaHostRegister (on CUDA) to make a CPU buffer not allocated through CUDA accessible from
605.
by my123 5y ago
> Like their new Metal based Machine learning library junk. Oh whats that you have an Intel Mac with a beefy external GPU supported by Metal… too bad this is M1 only Note that it’s temporary (as of today) because of bugs in Intel’s Metal
606.
by my123 5y ago
Note that Microsoft had C++ AMP on that front, https://docs.microsoft.com/en-us/cpp/parallel/amp/cpp-amp-ov... . That worked on DirectX devices as a whole. However, MS failed to capitalise on it and baile
607.
by my123 5y ago
Among other things: C++ on the GPU, with lots of common code between the two worlds. It’s one of the core reasons why CUDA took off. You could adapt your code instead of a full rewrite, even mixing code within the same file. Types are check
608.
by my123 5y ago
Blender decided to support just the platforms which have a C++ target device language. This encompasses CUDA, Metal[1] (one of the reasons why it’s much more usable than Vulkan), ROCm HIP, and oneAPI[2]. [1] Metal’s Shading Language is C++1
609.
by my123 5y ago
> 1. What will the impact be for ROCm's Navi support on Linux? You will see that supported officially in ROCm 5.0, the next ROCm release. Note that ROCm 5.0 drops support for first generation Vega GPUs. (Radeon Instinct MI25) The on
610.
by my123 5y ago
> Looks like this more about adapt existing CUDA code to work with AMD. So it makes sense as the least resistance approach I suppose. It isn't about that. Vulkan isn't flexible enough to allow it to happen. Give true pointers s
611.
by my123 5y ago
Note that this is only supported on RDNA2 onwards. It is _enabled_ on 1st gen RDNA, but with no "official support" from AMD. (as such, no SLAs or any guarantees really) On prior generations, it's not enabled at all. (Vega, Po
612.
by my123 5y ago
None today. those HPC machines will be the first ones
613.
by my123 5y ago
ROCm 4.5 is also the last release to support their own Vega 10 based accelerator. (Radeon Instinct MI25) https://github.com/RadeonOpenCompute/ROCm#amd-instinct-mi25-... aka AMD doesn't care... they just want the s
614.
by my123 5y ago
That’s insecure today anyway. Containers are not a security boundary. (If you don’t use a VMM like gVisor, Firecracker or go the Drawbridge way)
615.
by my123 5y ago
Hm, your own link shows that NVDAGF100Hal.kext is present though, so something for Fermi is _probably_ possible. TIL that support for NV cards on Monterey is gone, it definitely was there in the betas.
616.
by my123 5y ago
> Most notably, OSX dropped support for all nVidia GPUs from Mojave onwards Not those shipped with Macs. The GeForce kexts to support the NVIDIA GPU gens that Apple shipped, Fermi and Kepler, are still present even on Monterey.
617.
ECS LIVA Mini Box QC710 Desktop – Snapdragon Developer Kit for Windows - $219(microsoft.com)
2 points by my123 5y ago|1 comments
618.
by my123 5y ago
macOS does this too.
619.
by my123 5y ago
> 1. dlopen has interactions with static linking that you should understand if you use both at the same time. Using dlopen when static linking is used is deprecated in glibc.
620.
by my123 5y ago
Boot Camp is direct on hardware indeed. VMs cover a significant proportion of the gap however.
621.
New – EC2 Instances (G5) with Nvidia A10G Tensor Core GPUs(aws.amazon.com)
95 points by my123 5y ago|71 comments
622.
by my123 5y ago
Also available for business iPads. Has some catches like... around 30 secs to switch between users, doesn't seem to be instant. Maybe it's faster now.
623.
3xTF32: FP32 accuracy with 2x Performance (on A100)(github.com)
3 points by my123 5y ago|0 comments
624.
by my123 5y ago
A sample for it: https://github.com/microsoft/dotnet-computevirtualization The docs (which are a bit useful): https://docs.microsoft.com/en-us/virtualization/api/hcs/over...
625.
Nvidia CuNumeric: Bringing GPU-Accelerated Supercomputing to the NumPy Ecosystem(developer.nvidia.com)
4 points by my123 5y ago|0 comments
626.
Jetson AGX Orin(nvidia.com)
2 points by my123 5y ago|0 comments
627.
Samsung develops industry's first LPDDR5X DRAM(news.samsung.com)
2 points by my123 5y ago|0 comments
628.
by my123 5y ago
No, you can however have .NET Standard assemblies that can load into both .NET (Core) and .NET (old) applications. Those use a common API subset, and are a stopgap to make migration easier.
629.
by my123 5y ago
On WSL2, Microsoft has their own init with another container launched for multiple reasons: - That other container, the WSL system distribution has a Wayland and a PulseAudio server for graphics integration. - in a regular WSL config, the V
630.
by my123 5y ago
Throughput is not an issue on the M1, with 4x 128-bit SIMD units. Neon is certainly not a bad SIMD ISA, it's a quite orthogonal one. You also have the AMX extension at hand, which is more special purpose but allow to deliver very high

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