mwachs5

3 ms·

1. 1.▲
   by mwachs5 10y ago

   You're correct, you can access the 128MBit SPI Flash as any other read-only memory mapped memory -- you can execute out of it or load data (you can also write to it but need to use a seperate channel, it's not directly memory map
2. 2.▲
   by mwachs5 10y ago

   The RISC-V ISA defines different privilege levels: Machine, Hypervisor, Supervisor, User. It is possible for a chip to conform to the RISC-V Privilege Spec v1.9 by only implementing the bare metal or Machine mode, which is what the chip on
3. 3.▲
   by mwachs5 10y ago

   You are correct. This first FE310 chip on the HiFive1 board does not have a built in ADC/DAC.