monocasa

39 ms·

931.
by monocasa 3y ago
Mask ROM.
932.
by monocasa 3y ago
Looking into it, those references look miscategorized. It's some Zambian national report that's talking about 0.18um processes (aka, 180nm) in the same paragraph, which wouldn't have come out until the very late 90s.
933.
by monocasa 3y ago
Yeah, exactly. 'Burning' itself being a holdover from PROMs, where you'd literally burn certain fuses in the array to select bits.
934.
by monocasa 3y ago
With a Gray code you typically try to oversample to where it's either not an option to change that quickly, or represents an error in its own right if it does.
935.
by monocasa 3y ago
I know it's an Apr1 post, but I'd honestly really like more historic supercomputer content from chipsandcheese; this was a great read.
936.
by monocasa 3y ago
Kind of reminds me of Gray code, who's whole shtick is being a sequence which only changes one bit at a time. If you see two bits change you know it's an error condition and can handle that explicitly. https://en.m.wik
937.
by monocasa 3y ago
It's probably implemented mainly on the Platform Security Processor.
938.
by monocasa 3y ago
Reminds me of Veratasium's visual representation of p-adic numbers. https://youtu.be/tRaq4aYPzCc?t=1514
939.
by monocasa 3y ago
> I did not find it, decompiled game worked in x64 mode on the first try. IIRC Raymond Chen was talking about a basically unreleased version of 64bit Alpha AXP, not the x64 port which had way more resources to spend on making the port wo
940.
by monocasa 3y ago
I've run it via wine for probably close to twenty years now.
941.
by monocasa 3y ago
Yes, as someone who shipped embedded systems running off of SD cards, it's a real problem. It's not the flash endurance you hit typically, but bugs in the card firmware that cause the FTL to completely lose it's mind. Yes, e
942.
by monocasa 3y ago
That's purely GPGPU and doesn't contain hardware like the rasterizers or texture samplers. Cool project though.
943.
by monocasa 3y ago
Which is why you saw this with relatively local and state level prosecutions from 90s tough on crime policies like three strikes laws.
944.
by monocasa 3y ago
> 62 times the cores of an H100.. 900,000. More than that arguably. CUDA cores are more like SIMD lanes than CPU cores like cerebras's usage of 'core'. Since they have 4 wide tensor ops on cerebras, there's arguably
945.
by monocasa 3y ago
> There's no open hardware GPU to speak of. Depending on license (can't find information?), this could be the first, and a starting point for more. There's this which is about the same kind of GPU https://github
946.
by monocasa 3y ago
I think they're just trying to keep it simple (which is totally fair, KISS principle is valuable). You can keep soft real time perf with this scheme, just like you can keep soft realtime perf on any system with a soft fill TLB. I say a
947.
by monocasa 3y ago
FWIW, you can support more than 8 regions by treating that hardware more like a soft fill TLB.
948.
by monocasa 3y ago
I know it can be done. NOR boot flashes like this were typically written and verified via boundary scan at manufacturing time. That's probably how this flash was initially written. I question whether you successfully performed that o
949.
by monocasa 3y ago
I think you'll find that even that is much quicker than twiddling lines via boundary scan. At best, JTAG boundary scan is basically one giant shift register generally hundreds to thousands of bits long. Every cycle you'd need to
950.
by monocasa 3y ago
Given that the top bit of every 16bit word looks to be set, I'm not sure that it does work.
951.
by monocasa 3y ago
You can put that nor flash into byte mode, saving you 8 data lines in exchange for an extra address line. You can also throw a shift register in to increase the number of GPIOs.
952.
by monocasa 3y ago
Yeah, there's no way it's running MySQl. I'd expect to see a CPIO archive, a UBoot copyright string, or something in that wheelhouse at the top of binwalk given that it's the NOR flash to a mediatek soc.
953.
by monocasa 3y ago
Yeah, about the only way this would make sense is if they used the boundary scan of the original board's SoC so they didn't have to desolder anything.
954.
by monocasa 3y ago
zip interestingly sticks the metadata at the end. That lets you add files to a zip without touching what's already been zipped. Just new metadata at the end. Modern tape archives like LTFS do the same thing as well.
955.
by monocasa 3y ago
Tapes currently don't really operate like tar anymore either. Filesystems like LTFS stick the metadata all in one blob somewhere.
956.
by monocasa 3y ago
They're also not the best for firmware putting it mildly. They don't have much of an engineering org anymore, they're just a marketing brand that white boxes contracted out designs.
957.
by monocasa 3y ago
I mean, bose is known for selling cheap devices as high end for the past few decades. It's not uncommon for the BoM to be ~10% of the final price.
958.
by monocasa 3y ago
Recent Adreno. VideoCore, IMG, Mali, the RDNA2 respun as "XClipse GPU" all do not use system standard IOMMUs to provide their user device contexts.
959.
by monocasa 3y ago
The way that's currently implemented is actually just one memory operation these days. L2 (or really wherever coherency is mostly managed) has a tiny ALU so in addition to read or write, atomicop is an operation you can send to L2. I
960.
by monocasa 3y ago
It is in this case.

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