medawsonjr

4 ms·

1. 1.▲
   CPU Affinity: Because Even a Single Chip Is Nonuniform(jabperf.com)

   1 points by medawsonjr 3y ago|0 comments
2. 2.▲
   by medawsonjr 3y ago

   https://www.jabperf.com/blog/ Started it a couple years ago. I post mostly about topics in the area of IT Performance Engineering, with more emphasis on low latency than on high throughput.
3. 3.▲
   by medawsonjr 4y ago

   Hi, I'm the author. I'm glad you enjoyed it, and pleasantly surprised that Tanel posted it already. I was right in the middle of posting it myself an hour ago when I noticed it had been posted and had fostered a discussion already
4. 4.▲
   by medawsonjr 4y ago

   Or better yet, Mellanox VMA since it's open source (unlike Solarflare OpenOnload) and the NICs are far less expensive.
5. 5.▲
   5-level vs. 4-level Page Tables: Does it Matter?(jabperf.com)

   2 points by medawsonjr 4y ago|0 comments
6. 6.▲
   TLB Shootdown Analysis and Upcoming HW Support Preview(jabperf.com)

   1 points by medawsonjr 4y ago|0 comments
7. 7.▲
   Debunking 5 Stubborn Systems Performance Myths(jabperf.com)

   2 points by medawsonjr 4y ago|0 comments
8. 8.▲
   Not Tracking CPU IPC Along with CPU% Creates Blind Spots(jabperf.com)

   2 points by medawsonjr 4y ago|0 comments
9. 9.▲
   Using Google Benchmark's Built-In PMU Counter Support(jabperf.com)

   1 points by medawsonjr 4y ago|0 comments
10. 10.▲
    by medawsonjr 4y ago

    It's configurable via MSR. You can also disable it system-wide or on a PCIe port basis. I detailed it all here: https://www.jabperf.com/skip-the-line-with-intel-ddio/