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gluggymug
searching PlanetScale…
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19 ms
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121.
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by
gluggymug
11y ago
Latches are caught by the synthesis tools generally. Designers usually run a unconstrained synthesis as a matter of course to determine whether they have written junk. As for the other bugs, I look forward to this new paradigm of spotting t
122.
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gluggymug
11y ago
Verification and synthesis are the pain points. Projects revolve around them not the design. In HW, the design of each module itself is usually pretty conservative. We are a conservative bunch remember! But it's feature creep that cram
123.
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gluggymug
11y ago
Verification IP is reusable code created by verification engineers. E.g. Say the designers are developing a networking module. The verification engineers would build the verification IP to generate the network packets. They also build the m
124.
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gluggymug
11y ago
Today's beginners don't make the tools. I must be too old. The new guys can come and bring their new tools. I am retired now. Back when I started, we used to care how the older engineers did stuff. The academics who trained us at
125.
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gluggymug
11y ago
I ask about clock domains because you stated real world designs are by and large synchronous. The issue is when we have data crossing clock domains we have a potential area for bugs dependent on the possible combinations of clock speeds. It
126.
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gluggymug
11y ago
Two big questions 1. Can it do cycle accurate simulation of multiple clock domains? 2. Can it reuse the verification IP after the design is converted to Verilog/VHDL?
127.
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gluggymug
11y ago
I wrote and verified IP and I worked at the SoC integration level. I would say hardware engineers realize the tools suck but this stuff is targeting issues I don't care about. The bugs are not due to language generally. If software guy
128.
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gluggymug
11y ago
Working in industry it IS straight Verilog directly. No macro language in Perl or anything else. Maybe people use emacs to help make stuff neat but that's it. Qualcomm has their own tool that created register files for sub modules from
129.
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gluggymug
11y ago
Biomimicry. It is when you study nature and animals to find an innovative idea to solve a man made problem.
130.
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gluggymug
11y ago
I used to work in ASIC design and verification. I have to agree with you. I can't take any of this stuff seriously. They are all toys aimed at newbies. They address problems that are no problem at all to a qualified engineer in the pro
131.
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gluggymug
11y ago
Does it have to be remote? If you can login on the same machine you can start the application with "racket whatever.rkt -i" to get a repl.
132.
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gluggymug
11y ago
I think we assign "meaning" to leisure so we give it as much value as our work. Gaming ourselves to respect leisure more. I.e. The itch we instinctively don't bother scratching when we are too busy working. We need to value t
133.
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gluggymug
11y ago
"Doing these things properly requires learning more skills. But time spent learning these skills is time not spent engineering. It almost seems more of a irrational reaction against modernity than it does an actual path towards greater
134.
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gluggymug
11y ago
"When you have a sedan/suv/minivan, traveling with kids is much more tolerable. You don't have to carry everything on your back or in your hands. You can strap them into car seats once and that's just about the only
135.
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gluggymug
12y ago
Lol. I used to work in HW. You are kind of insulting but it's true: we take what we can get. I am not sure what you are suggesting HW engineers do. Who has time to build a better tool? That's a massive task. When you are on a proj
136.
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gluggymug
12y ago
Radar is a bit niche. Embedded signal processing SW might be a good avenue. Verification is another one. Like any job, HW companies either want experienced people or grads to do the crap work. You need a related skill-set to go for experien
137.
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gluggymug
12y ago
I was one of those semiconductor guys for about 15 years but now I am in the retirement phase. I worked for Motorola, Freescale, Canon and Qualcomm. Did the FPGA stuff at Canon. Believe it or not they let people in all the time. And they le
138.
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gluggymug
12y ago
I've completed a certification in TIG, MIG and Stick welding and metal fabrication. Welding overhead is considered more difficult because gravity is making the molten metal run away from the joint. Less metal in the join means less str
139.
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gluggymug
12y ago
First, the article was about London not SF. London is dominated by finance not computing. Hence the use of quotes around 'creatives'. Most jobs in finance are just juggling other people's money. They aren't creating anyt
140.
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gluggymug
12y ago
"Favorite code read ... Z3 (Verilog)" As someone working in ASIC design and verification, that code is not a good read IMO. I am stunned it even synthesized. The use of "initial" and "task" is not generally for