damageboy

5 ms·

1.
by damageboy 7mo ago
The rules don't apply for reporters outside of Israel, and this was historically been the way that Israeli journos and other bypass the censorship completely. The author is being pressured (IMO) because the degens feel like they can th
2.
by damageboy 11mo ago
I can see why systolic arrays come to mind, but this is different. While there are indeed many ALUs connected to each other in a systolic array and in a data-flow chip, data-flow is usually more flexible (at a cost of complexity) and the AL
3.
by damageboy 11mo ago
No real overlap with Cerebras. Have tons of respect for what they do and achieve, but unrelated arch / approach / target-customers.
4.
by damageboy 11mo ago
You can indeed and should assume there is a heavy JIT component to it. At the same time, it is important to note that this is geared for already highly parallel code. In other words, while the JIT can be applied to all code in principle, th
5.
by damageboy 11mo ago
Not really. I work for NextSilicon. It's a data-flow oriented design. We will eventually have more details available that gradually explain this.
6.
by damageboy 11mo ago
Yeah, it's an unfortunate overlap. The Mill-Core in NextSilicon terminology is the software defined "configuration" of the chip so to speak that represents swaths of the application that are deemed worthy of acceleration as e
7.
by damageboy 11mo ago
I work in NS. The riscv was the "one more thing" aspect of the "reveal". The main product/architecture discussed has nothing to do with vector processors or riscv. It's a new, fundamentally different data-flow
8.
NextSilicon Maverick-2 Tech Launch(youtube.com)
3 points by damageboy 11mo ago|0 comments
9.
Abraham Lempel (LZ77) has died(en.wikipedia.org)
13 points by damageboy 4y ago|0 comments
10.
by damageboy 4y ago
Then your org is over paying for mediocre HW, at least for servers, arguably also for laptops (Dev machines for sure) At least for the last two years.
11.
by damageboy 5y ago
Thank you for writing the obvious. Instruction Byte count is the wrong metric here 100%. Instruction Count (given reasonable decoding/timing constraints) is the thing to optimize for and indeed variable length encoding is very bad.
12.
by damageboy 7y ago
OP from twitter here. I'll take the blame for the click-baity-ness, but I was really shocked and this was in real-time in my defense. I'm assuming it will get resolved, as the errata suggests by shoving lots of 0x2c segment overri
13.
Israeli Archaeologists Resurrect 5k-Year-Old Yeast and Make Beer from It(haaretz.com)
2 points by damageboy 7y ago|0 comments
14.
by damageboy 8y ago
Isn't this a whole lot of words for installing traefik with DNS challenge and let it do basically all of the work?
15.
Performance analysis of first generation HPC-optimized Arm processors [pdf](onlinelibrary.wiley.com)
3 points by damageboy 8y ago|0 comments
16.
by damageboy 8y ago
Fault? He is getting free publicity to the point he is even on the front page of HN (not that he care about this specifically). Show me the last time this happened with a French book up for a prize.
17.
by damageboy 8y ago
Would be interesting to see how xsv compared to miller ( https://johnkerl.org/miller/doc/index.html ) in terms of perf, this tool comes exactly as I am about to munge 1TB of gzipped csv files. Unfortunately, the mai
18.
NET Core 3.0 Intrinsics in Real Life(bits.houmus.org)
2 points by damageboy 8y ago|0 comments
19.
by damageboy 15y ago
What a load of crap... you just wasted 2gb of address space not of DRAM... You'll "waste" exactly up to the amount of stack each thread uses, rounded up to PAGE_SIZE which is usually 4kb Let me guess, a nodejs fan?