brigade

50 ms·

571.
by brigade 12y ago
In the old 3-stage ARM pipeline, the instruction reads pc (as with all registers) during the execute stage, which is 2 cycles after fetch. ARM froze this definition for compatibility, so it's +8 for ARM and +4 for thumb despite not usi
572.
by brigade 12y ago
Depends on what you mean by microcode. Pretty much any CPU that implements division or transcendental functions does so via microcode, for instance.
573.
by brigade 12y ago
His foo5 struct is a good example of this - there's two more bytes of padding on Darwin (at least) than what he specifies.
574.
by brigade 12y ago
Dynamic codegen in games might be less of an issue, but instead you get to deal with emulating a MMU among other things. And the point is that all of these issues specific to whole-system emulators mean that static recompilation isn'
575.
by brigade 12y ago
Static recompilation, no. See http://andrewkelley.me/post/jamulator.html for an attempt at that and why it isn't useful.
576.
by brigade 12y ago
It's one instruction per cycle that gets 8 flops. And what are you arguing even? Assuming its unthrottled FP32, that gives a quad-core A15 at 2GHz 7 watts to be over 5x less efficient.
577.
by brigade 12y ago
Mobile SoCs claimed numbers are hard to take at face value. For one, I'm 98% sure that's FP16 flops. For another, basically all SoCs in shipping devices throttle under load, so efficiency is hard to determine from unrelated peak p
578.
by brigade 12y ago
But normalizing for power reduces the GPU advantage even more! Haswell for instance achieves about 5.3-5.8 GFLOP/W, compared to 24-28 GFLOP/W of Maxwell. That's less than a 5x theoretical computational gain.
579.
by brigade 12y ago
Well, Adobe hasn't added support to Flash yet. Plus, given their massive display pipeline performance problems, it's quite possible that they won't be able do 4k 10-bit HEVC when it's finally added.
580.
by brigade 12y ago
Well apps want to scroll more than just a static image. And it's only partly the API's fault - OS X switched to overdraw only recently in 10.9, and without any major change to API.
581.
by brigade 12y ago
That's the magic I'm talking about because it's not true; memory is memory and stack memory isn't treated specially by the processor. What it does have is a store buffer, which applies to all memory accesses and is what
582.
by brigade 12y ago
You (and a lot of people) make it sound like its magic but it's not - http://blog.stuffedcow.net/2014/01/x86-memory-disambiguation...
583.
by brigade 12y ago
Well if it's between auto vectorization or intrinsics... Lately I've been rather disappointed in how minimal the gains are in reducing register spills from intrinsics on modern CPUs, with their wide decode/issue, 16 registers
584.
by brigade 12y ago
Since K7/K8 at least. See Agner Fog's microarchitecture manuals, or Anandtech's core/K8 comparison. You're probably thinking in terms of AMD's "macro-ops" which is basically the same thing as Intel&#x
585.
by brigade 12y ago
The decoders have a throughput of 4 fused uops or instructions per cycle, but are limited to 16 bytes per cycle (which tends to become the limit if you attempt to push >4 unfused uop perc cycle). But in Haswell, the uop cache has double
586.
by brigade 12y ago
Only since January 27, 2013, and not in all states. [1] [1] http://usa.visa.com/personal/get-help/checkout-fees.jsp
587.
by brigade 12y ago
Displayport (and HDMI) have a 2 bit ECC overhead for every 8 bits transmitted, so effective bandwidth of DP 1.2 is 17.28 Gbit/s. Additionally, the timing adds additional overhead, so the required bandwidth is actually 22.18 Gbit/s
588.
by brigade 12y ago
No rumors, but it would make sense to come out about a year after they released the Titan black, which itself was about a year after they released the original Titan.
589.
by brigade 12y ago
As mentioned in the article, the current (and consistent across existing rulings) legal theory is that the 5th amendment doesn't apply if it's already been "proven" that you know the passcode, since the self-incriminatio
590.
by brigade 12y ago
In terms of being unnecessarily hard to program, that was the Saturn. Which Sega learned from and made the Dreamcast relatively easy to program. They just chose the a newer revision of the CPU architecture they used in the Saturn, which was
591.
by brigade 12y ago
If you're comparing "narrow and deep" to "wide and shallow", neither won, really. Modern high-performance designs are basically "wide and deep" with lots of speculation, better branch prediction, and vario
592.
by brigade 12y ago
He's programming for 200W+ dedicated AMD cards. It may surprise you that AMD can't match that level of performance in their 65W SoCs either.
593.
by brigade 12y ago
Linus has said that the pain point actually starts around 1GB, especially when using a 3/1 userspace/kernel address split. At 1GB, you can't map the entirety of physical ram into kernel address space simultaneously, since you
594.
by brigade 12y ago
In the US, it's almost certainly illegal. (though admittedly very unlikely to be prosecuted) All materials used for RE must have been obtained legitimately, and as far as I'm aware any legit way to obtain this sort of manual for c
595.
by brigade 12y ago
Techdirt did a good bit of analysis back when the camera owner was issuing takedowns and concluded that it's almost certainly public domain under US, UK, and international law - https://www.techdirt.com/articles/20
596.
by brigade 12y ago
Um, ARM by default is very not PIC; loads have only a 4k offset so references to the data section are stored as absolute addresses in the text section, unless you explicitly specify PIC which adds another 'add rN, pc' instruction
597.
by brigade 12y ago
> The ELF dynamic linking mechanism is designed to emulate static linking. That's like designing cars to neigh and occasionally kick people to death with robot legs that exist only for this purpose. So I'm only passingly famili
598.
by brigade 12y ago
No, there are 4:4:4 and 4:2:2 modes in JPEG. H.264 also defines such modes, but no consumer hardware decoders support them so they aren't commonly used.
599.
by brigade 12y ago
Eh, new instructions are added all the time. Just look at BMI - I'd be willing to bet the static power cost of adding that dwarfs what trapping arithmetic would cost. And most of those instructions are more esoteric and/or give le
600.
by brigade 12y ago
Citing stuff from the 80s RISC movement is pretty outdated nowadays, especially in this specific case where quintessential RISC architectures such as MIPS implemented trapping arithmetic instructions from the start.

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