brigade

44 ms·

511.
by brigade 9y ago
Well, no. A 10-core HEDT Skylake follow up to the 10-core Broadwell was basically a given, and would have shipped right about now regardless. Maybe Ryzen caused them to push the default clocks up, but probably not since it's unlocked a
512.
by brigade 9y ago
> High Register and 16bit registers are huge wart that it seems Intel is trying desperately hard to get us to stop using. Someone really ought to tell clang and gcc this; they both happily use 16-bit registers for 16-bit arithmetic. An
513.
by brigade 9y ago
Sorry, I was wrong, it's only 7 slots - ASUS x99-e-10g ws is the board I was thinking of.
514.
by brigade 9y ago
Not sure if you already knew about them, but there are consumer X99 motherboards that include PLX8747 switches to mux 32 PCIe lanes from the CPU into 7 PCIe x8 slots, at premium of maybe $200 for the motherboard and $300 for a compatible CP
515.
by brigade 9y ago
And for a counterpoint that it's still the case that compilers can produce horrible codegen from intrinsics in 2017, this entire thread: http://www.realworldtech.com/forum/?threadid=166719
516.
by brigade 9y ago
So maybe a more useful comment than video-range/full-range pedantry over historical brokenness: Banding (which I think is the root cause of all your complaints) is effectively due to overly coarse quantization. This is amplified in H.2
517.
by brigade 9y ago
Sorry for thinking you were talking about image codecs and thinking you were confusing RGB black with superblack.
518.
by brigade 9y ago
Well... 1. You asserted that 0/0% in image codecs was superblack. The most common codec for which that is actually true is WebP, which I'll bet no one in this thread actually cares about. 2. In digital colorimetry, gamut and range
519.
by brigade 9y ago
Domain experts sometimes don't realize when their knowledge is out of date. To wit: HDMI does allow for 0-255 (or 1023, etc) "full range" quantization instead of the default "limited range" of 16-235 for most CEA-
520.
by brigade 9y ago
No. All ISAs add instructions that make sense for some important use case and can be executed efficiently (generally with a throughput of at least 1 per cycle.) x86's "power hungry" issues are basically that determining how m
521.
by brigade 9y ago
Eh, if the US somehow forced Apple to repatriate all its international revenue, the US still wouldn't benefit from that because then there's much less incentive for Apple to reduce how much they pay in local foreign taxes. So th
522.
by brigade 10y ago
Bit rot isn't addressed by any filesystem without device redundancy, which no Apple device has had as an option since the Mac Mini server was discontinued.
523.
by brigade 10y ago
That's trade-in value. Auction value is lower. Additionally, being repo'd is a hefty detractor to the auction price; plenty of dealerships categorically don't buy repo cars. Plenty of customers, too. Plus the repo fee coming
524.
by brigade 10y ago
Do you actually believe that even a quarter of people taking out subprime loans could afford to replace their car with Uber, assuming it's even available where they live? Second, yes homes can't move, but the legal process you n
525.
by brigade 10y ago
Well, except for the "high end" Core-i7 SKUs. i7-6800k and above are based on the 5th generation Broadwell architecture, not the 6th generation as you might expect. And honestly, the SKUs "level" is a fair bit more rando
526.
by brigade 10y ago
Sure, you can file a bug with a snippet and expected assembly and make the devs do the work :P They generally seem pretty willing if it's simple, and if it isn't then it'd probably be a pretty involved (but interesting!) side
527.
by brigade 10y ago
As an example, there exist bitstreams where there aren't actually any keyframes, but instead the encoder guarantees that the decoder output converges to correct after decoding some number of frames. It's actually kinda how MDCT au
528.
by brigade 10y ago
I'll second p1esk calling the CPU version barely optimized based solely on the numbers you're providing. Unless you're comparing a D410 against a Titan X?
529.
by brigade 10y ago
Going further, power for power on the current generation, for SGEMM, i'd expect GPUs to beat CPUs by maybe 5x (6700k has a theoretical 512 gflops at 91W, while xeons can come a bit shy of 1.5 tflops at 145w) Which is still pretty major
530.
by brigade 10y ago
You say "keep", but the last time the MBP regressed in battery capacity was 2008. Their last major reduction in thinness resulted in a significant capacity upgrade thanks to ditching the optical and 2.5" drives.
531.
by brigade 10y ago
Yes, but the CPU and GPU performance of those are worse than the Skylake chips in the touchbar MBPs.
532.
by brigade 10y ago
If you zero upfront, you have to do all of that save the page fault anyway, but for large allocations you also thrash the cache zeroing stuff that's immediately evicted to memory. It really is faster in general to zero a page when the
533.
by brigade 10y ago
?? The comment is based on the fact that they're equipped with quad core Skylake processors, therefore they probably have enough thermal headroom to handle what they actually have.
534.
by brigade 10y ago
Even then, the article and co-commentators exaggerate the cost and factors you should worry about for virtual calls. Unless you're optimizing specifically for an in-order CPU, the only cost of virtual functions that really matters in t
535.
by brigade 10y ago
HEVC got an additional licensing pool in HEVC Advance that demanded significantly greater license fees on top of MPEG LA's. Said group's demands are basically the reason Netflix started considering VP9.
536.
by brigade 10y ago
Every time I've looked at a hot function across x86-64 and arm(64), x86 needs more instructions too. Really the only thing x86 does more in one instruction that compilers actually use is memory operands, but they'll readily split
537.
by brigade 10y ago
Which CPU exactly were you hoping for instead of i7-6920HQ?
538.
by brigade 10y ago
"SIMT" really is just a programming model that maps down to SIMD execution; even back in 2011 NVIDIA GPUs were SIMD machines. Scatter, gather, and predication features in your SIMD ISA make the SIMT -> SIMD mapping fast for the
539.
by brigade 10y ago
It's always weird to read codec commentary from broadcast people; their world and concerns are just so alien to me. I also rather wonder what he considers a raw bytestream that HEVC has and VP9 doesn't... Anyway, I guess the only
540.
by brigade 10y ago
Well for starters, Anandtech measured the NAND performance of the 6s as significantly faster than the Note7; 1.65x faster sequential 256k and 1.15x faster random 4K.

More ›