No. All ISAs add instructions that make sense for some important use case and can be executed efficiently (generally with a throughput of at least 1 per cycle.)

No. All ISAs add instructions that make sense for some important use case and can be executed efficiently (generally with a throughput of at least 1 per cycle.) x86's "power hungry" issues are basically that determining how many bytes an instruction takes is a significant fraction of fully decoding it, thus the existence of the µop cache. And to a much lesser extent, partial register accesses. The former ARM has already shown that a simpler scheme can work well (thumb-2), and the latter aarch64 explicitly fixed over armv7 and isn't going to regress now that everyone knows that it's an issue. Verification is more expensive for x86 sure, but any CPU approaching the complexity of modern OoOE monsters isn't going to be drastically cheaper to verify just because of the ISA.