Y
HN Search
Hacker News Search
new
|
comments
|
top
|
jobs
brigade
searching PlanetScale…
1.
▲
2.
▲
3.
▲
4.
▲
5.
▲
6.
▲
35 ms
·
421.
▲
by
brigade
6y ago
Gigabyte you mean? It should work, but note that you really want a GPU that supports DSC (RTX 20-series or newer) The two paths for 10bit 6k60 are either HBR2 + DSC, or 2x HBR3 streams. The 2x HBR3 streams have several gotchas - not daisy-c
422.
▲
by
brigade
6y ago
They were just coming out of the Atari crash, which in a large part was blamed on a surplus of shitty games.
423.
▲
by
brigade
6y ago
AMX was first announced for the A13 [1], so it's been in the wild for over a year now. 1: https://www.anandtech.com/show/14859/apple-announces-new-iph...
424.
▲
by
brigade
6y ago
M1’s big cores already match Intel and AMD consumer SKUs in flops/cycle... x86 pretty much had to go with wider ALUs because it was cheaper than widening instruction decode. Anyway there’s already AMX
425.
▲
by
brigade
6y ago
It's shitty, but just FYI: you can pay Comcast an additional $30/mo for unlimited data. They hide the option, but it was ultimately the least bad option to handle my WFH traffic after Comcast re-instated the caps.
426.
▲
by
brigade
6y ago
Much less? Which display? The closest competitor I’ve found is the PA32UCX at $4500, and supposedly its fan is noisy enough that I’m hesitant to buy it.
427.
▲
by
brigade
6y ago
According to TSOEnabler, threads with the TSO property set simply aren’t scheduled onto cores that don’t support TSO. As for sharing data, a non-TSO thread can basically assume that a thread using TSO is equivalent to a non-TSO thread using
428.
▲
by
brigade
6y ago
Well sure, POWER7 implemented a strong-ordering mode specifically for x86 emulation a decade ago [1] [1] https://marc.info/?l=linux-mm&m=121382852909406&w=2
429.
▲
by
brigade
6y ago
To be fair, full-system emulation is still going to be pretty slow; emulating an MMU is painful and it's not going to be any easier when you can't use 4k pages.
430.
▲
by
brigade
6y ago
Yeah... both QEMU and Bochs have long been able to emulate a full x86 system. QEMU at least has had some people boot x86 macOS under emulation, but it hasn't been that interesting until now, since on x86 running macOS under a VM has be
431.
▲
by
brigade
6y ago
In the PPC -> x86 transition, the same hard drive could be used to boot both PPC and x86 Macs (e.g. via target disk mode or external HDDs)
432.
▲
by
brigade
6y ago
The Intel 13" MBP with 2 TB3 ports also topped out at 16GB. They're actually still selling the Intel 13" MBP with 4 TB3 ports, which is the model that can be configured to 32GB.
433.
▲
by
brigade
6y ago
It's already the case that the Macbook Pro and Air have the "same" CPU - 1068NG7 and 1060NG7 are physically the same die, but with different power limits.
434.
▲
by
brigade
6y ago
There are 1U servers with 32 EDSFF slots, which were advertised to reach 1PB with 32TB SSDs. But 16TB is more common, and that's still 2PB in 4U that you can buy today without getting into exotic pricing.
435.
▲
by
brigade
6y ago
...why? The last 4x increase was 2012-2015, then it's been pretty stagnant since then. So has inter-state movement been stagnant for the last 5 years? 2006-2011 was the housing crash and recovery; it doesn't seem like an outlier f
436.
▲
by
brigade
6y ago
I guess I'm sort of surprised that a unique key per device isn't common yet...
437.
▲
by
brigade
6y ago
For HD, you'd also need a valid vendor-signed key to do the key exchange (which would get swiftly revoked once public), and/or to crack the trusted execution environment.
438.
▲
by
brigade
6y ago
> A certified dealership will have the computer interface and software to reset the fault mode. For those that do not have this software, Ferrari can remote into the car and reset it for you. Ferrari actually flew a technician in to visi
439.
▲
by
brigade
6y ago
Probably a corruption of the fact that the protocol to get HDMI out of the Switch is a proprietary alt-mode, which is why standard docks and USB-C to HDMI adapters don't work. But USB-PD chargers are very much intended to work. The doc
440.
▲
by
brigade
6y ago
That section of the rules probably doesn't apply to the PS4 app because they mirror the entire OS of the PS4 instead of just the Steam app. (iOS steam link is local network only)
441.
▲
by
brigade
6y ago
The 32 variable length registers don’t overlap; the register grouping is orthogonal to the length of each register. The grouping... sounds “interesting” to implement in an OoOE design. Most obvious would be to have the instruction decoder e
442.
▲
by
brigade
6y ago
Especially in the context of Intel using overseas fabs, the dire bit of that article is > a lot of the manufacturing output growth since the mid-1980s, when the BEA started factoring quality improvements in computers into its measures of
443.
▲
by
brigade
6y ago
The US Surgeon General went a step further and literally said "You can increase your risk of getting it by wearing a mask if you are not a health care provider"
444.
▲
by
brigade
6y ago
Sure, no emulator serious about performance uses an interpreter these days. Even full-system emulators.
445.
▲
by
brigade
6y ago
What is the difference supposed to be anyway? It's user-mode emulation of x86_64 whether the translation happens just-in-time or ahead-of-time. AOT just can afford to spend more time optimizing out redundant emulation operations in e
446.
▲
by
brigade
6y ago
On the other hand, the ARMv8.5 flag manipulation instructions almost certainly were added specifically for x86 emulation.
447.
▲
by
brigade
6y ago
> GPU directly read from a SSD, bypassing all of the steps in between Ehh... unless you have more specific knowledge that’s still under NDA, the reasonable assumption is that the CPU still mmap()es the file into the GPU’s address space,
448.
▲
by
brigade
6y ago
As mentioned in your link, that's ultimately against ARM's requirements for big.LITTLE and was due to buggy Samsung patches. A fixed kernel only exposes the subset of features available on all CPUs.
449.
▲
by
brigade
6y ago
Throughput isn't the inverse of latency; the throughput of L1 <-> L2 is 1 line per cycle. If IA32_FLUSH_CMD exists, probably a better order-of-magnitude estimate is ~200ns for writing back dirty lines to L2 during the switch.
450.
▲
by
brigade
6y ago
Already 0.1% of NYC's population has died from COVID-19 - 10k deaths of 8.54 million people. That's... quite a bit higher than LA's current 576 of 10 million. So either everyone in New York City was infected, or most probab
More ›