asb

14 ms·

91.
by asb 10y ago
You're very welcome! I'm hoping to increase activity on the blog over the coming weeks and months so hopefully I'll be doing a better job in the future of keeping you up to date on developments both with lowRISC itself and in
92.
by asb 10y ago
I agree, open source hardware (and especially open source silicon, where there are such huge barriers of entry) is very much different to open source software. It's possible that a breakthrough in direct-write lithography or similar wo
93.
by asb 10y ago
I think that's a really good question. How many people make derivative designs from the Arduino is hard to say. It seems more common to prototype with an Arduino, and then when moving to a product to do a custom board design (as lets f
94.
by asb 10y ago
The short answer to this is that no, we're not at the stage where we've carefully considered these parameters. Most of our focus so far has been on the platform design+implementation and on ensuring there is at least one viable ro
95.
by asb 10y ago
RISC-V is an open specification that can be implemented by proprietary and open source efforts alike. This means there's nothing stopping someone else doing a RISC-V SoC that, like most current commercial cores, has documentation &quot
96.
by asb 10y ago
Absolutely. Our main focus right now is in completing the RTL design for our initial SoC platform, at which point we can perform a test run (multi-project wafer) and ultimately volume production.
97.
by asb 10y ago
I hope we'll be 'Respect Your Freedom' compliant https://www.fsf.org/resources/hw/endorsement/respects-your-f... . This is of course trivial for our core SoC, where we have no intention of relyi
98.
by asb 10y ago
We are working towards producing a lowRISC SoC design along with low-cost development boards. I will say that hitting the Raspberry Pi pricepoint is challenging. It's a hard price to hit even when using off-the-shelf silicon that'
99.
by asb 10y ago
I'm one of the founders of lowRISC, a not-for-profit effort to produce a completely open source, Linux capable, multi-core SoC. Fundamentally, we believe that the benefits of open source we enjoy in the software world can be applied to
100.
by asb 10y ago
That's what we're working towards with http://www.lowrisc.org
101.
by asb 10y ago
There'll be some small amount of additional per-language work generally. I (and lowrisc.org as a whole) would be keen to support people attempting such ports. Rust and Swift are obviously high on the list.
102.
by asb 10y ago
Please see here for background on the effort: http://lists.llvm.org/pipermail/llvm-dev/2016-August/103748.... I believe that given RISC-V's status as a clean and open ISA, the RISC-V port for any project
103.
by asb 10y ago
Has anyone had any experience with vue.js + Dart?
104.
by asb 10y ago
https://listmaster.pepperfish.net/pipermail/lowrisc-dev-list... This was cross-posted on RISC-V sw-dev, but Google Groups is failing to load for me right now.
105.
by asb 10y ago
I think the argument about config-string has been won. The last post mentioning them from the team working on the privileged spec draft seemed to indicate a tactical retreat on the issue. I actually thought the whole SBI thing might cause m
106.
by asb 10y ago
I discussed this issue with a GCC developer at the LLVM Cauldron in Hebden Bridge a few weeks ago. He pointed out that although it's understandable the UC Berkeley regents balk at the idea of exclusive copyright assignment, the terms o
107.
by asb 10y ago
Thanks for the note. I've got a lightning talk at the upcoming November LLVM Dev meeting where I'll give an update (and should be refreshing my patches and updating on the llvm mailing list the next few days). Sadly the proposal C
108.
by asb 10y ago
QEMU on modern x86 is going to give _much_ better performance than an FPGA.
109.
by asb 10y ago
I'm sure it will enter CE fairly soon now. The Gitlab vs GitHub competition is good for all of us.
110.
by asb 10y ago
Honestly that sounds like a case where you could improve your interview technique (or perhaps the interviewers could have done better on drilling down into your thinking). The fact you considered multiple options, evaluated them mentally an
111.
by asb 10y ago
Right now, Gerrit and Phabricator give an almost unrivalled code review experience - the ability to queue multiple comments up and submit them at once, mark previous things as fixed, keep track of a patch as it evolves along with the commen
112.
by asb 10y ago
Hi, you might be interested in our lowRISC project which is working towards producing a fully open-source SoC implementing the RISC-V instruction set architecture. Some of the key features we are focusing on, minion cores and tagged memory
113.
by asb 10y ago
I blogged a summary of the various talks here, which may be of interest http://www.lowrisc.org/blog/2016/07/notes-from-the-fourth-ri... . With lowRISC, we've established a not-for-profit project aiming to
114.
by asb 10y ago
I'm horrifically biased (I'm getting married to the author in a few months :)) but Adventures in Raspberry Pi seems to get great feedback https://www.amazon.com/Adventures-Raspberry-Carrie-Anne-Phil... as well as
115.
by asb 10y ago
Given the discussion of patents and instruction sets, you may be interested in the work of David Patterson and his student Tony Chen in tracking prior at of all RISC-V instructions http://www.eecs.berkeley.edu/Pubs/Tech
116.
by asb 10y ago
We currently store tags in a separate region of physical memory, though you could imagine "borrowing" ECC bits. A tag cache (which due to the small size of tags can have a large reach) reduces the number of instances where you mig
117.
by asb 10y ago
Yes, the RISC-V Foundation will be making slides+video available. Watch http://riscv.org for updates. Rick O'Connor (Executive Director of the Foundation) suggests we might see them the end of next week or early the week af
118.
by asb 10y ago
Target: 28nm, 4x 1GHz+ application cores, ~8 minion cores (see http://www.lowrisc.org/docs/memo-2014-001-tagged-memory-and-... ), tagged memory, USB, LPDDR3. For more detailed specs, that's going to depend on confi
119.
by asb 10y ago
It definitely will be a cool chip to mess with but is not yet complete. At the workshop, Wei Song presented our latest work on adding trace debug features (which will be properly introduced on the blog soon). We expect to be RTL complete ea
120.
by asb 10y ago
I'm a co-founder of the lowRISC project (and author of the linked article). Our mission is precisely to make this sort of startup more feasible. We are a not-for-profit project aiming to be the "Linux of the hardware world".

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