Taniwha

28 ms·

391.
by Taniwha 3y ago
Author here - this is very much a work in progress, not that interesting (yet) For those who are interested RISC-V has a cool vector unit - you can write portable code that runs on a whole range of vector units of different sizes (rather th
392.
by Taniwha 3y ago
I think he was more saying that he looked at the chips used for laptop cooling fans for use in his (drone) design
393.
by Taniwha 3y ago
(for those who are not RISCV people a 'hartid' is a cpu register unique to each core that identifies it) (to the implementer) it's worth noting that hartids are not guaranteed to be contiguous - one is guaranteed to be 0 - th
394.
by Taniwha 3y ago
One of the common maps used in schools cuts off the bottom quarter of the map, including Antarctica making the southern hemisphere half the size of the northern
395.
by Taniwha 3y ago
Yes, it's SIMD but vector too, more in a Cray sort of way rather than an x86
396.
by Taniwha 3y ago
Either: "jal lr, dest" or "jalr lr, offset(reg)" Both save the address of the next instruction in lr, the first is a relative branch the second is to the address pointed by a register plus an offset Use "jalr r0, 0(
397.
by Taniwha 3y ago
Dad just thought it was stupid
398.
by Taniwha 3y ago
My dad wrote the gardening column in the local newspaper, and a yearly gardening book, when NZ went metric they updated the book with things like "plant seeds an inch apart" with "plant seeds 2.54cm apart" .....
399.
by Taniwha 3y ago
exactly - almost every cable and satellite system is using them
400.
by Taniwha 3y ago
But until relatively recently San Franciso was SV adjacent, not really part of it, more like the grown up cousin up the road where the traditional bankers lived. San Jose has always been the big city in Silicon Valley
401.
by Taniwha 3y ago
It does claim a slice
402.
by Taniwha 3y ago
There have always been compilers that skip the "make assembly source" and go straight to object files - in fact the first time I saw unix V6 cc I was a bit scandalised (but it made sense for a system where programs had to be <=
403.
by Taniwha 3y ago
I spent a lot of time programming WE32X00s, they were very much similar to 68Ks/32ks - CISC descendants of vaxes. While I didn't get to program any of the CRISP cpus as I understand them they are much closer to 29Ks/SPARCs (R
404.
by Taniwha 3y ago
Also no, hobbit was a CRISP (RISC) core, bellmac aka WE32x00 was a CISCy (68020 level) core
405.
by Taniwha 3y ago
We hired one of the guys who worked on Apple's hobbit/crisp or the newton, he'd git his cpu back from the fab, worked first time, but politics suddenly went ARM - he quit
406.
by Taniwha 3y ago
isn't this the hobbit/crisp core that was supposed to go in the newton?
407.
by Taniwha 3y ago
I've written about it elsewhere in this thread but I've found that a simple vopice menu that has a message (that might sound like a voicemail to a spammer's dial computer) and that requires people dialing in to press one key
408.
by Taniwha 3y ago
I put in an asterix system 20 years ago, it still runs great, all I've done has been to replace a couple of dying (RAIDed) drives. I live in NZ used to live in the Bay Area, NZ trunks come in from a local SIP provider and use an Ooma b
409.
by Taniwha 3y ago
I think that Alzheimer's likely has many causes. This research indicates that the chickenpox/shingles virus may be related to about 20% of dementia cases - so not all Alzheimer's but an appreciable amount. It could be that ot
410.
by Taniwha 3y ago
Oh I really don't want to get sued .... his name was all over the SFChron's biz pages once ....
411.
by Taniwha 3y ago
I worked for a guy that ended up embezzling for the next company (a consortium) that he fronted , when he was caught (met by sheriffs at SFO) the European members of the consortium wanted blood, the US ones wanted to sweep it all under the
412.
by Taniwha 3y ago
I've previously been an ASIC designer, so that's what I've been aiming it at. FPGAs are just a great way to find bugs (you'll notice I've spent no time on performance) though now the design is too big for even that
413.
by Taniwha 3y ago
As you point out current VROOM! is 4-8 into the decoder depending on the mix of incoming instructions, each decode block can decode one 32-bit instruction, or 2 16-bit ones. A VERY general rule of thumb is that every 5th instruction is a br
414.
by Taniwha 3y ago
Except that pasta came from China 1000 years later ....
415.
by Taniwha 3y ago
essentially yes, except that on modern CPUs the fetch/decode stages (where the branch predictors live) are so far away (in space and time) from where the loop counters live that it's not practical to connect them directly - instea
416.
by Taniwha 3y ago
Yes but this is floating point - +0.0 represents all numbers between 0 and the smallest +ve FP number, -0.0 represents all numbers between 0 and the smallest -ve FP number - both can represent actual 0 - remember these can be generated by u
417.
by Taniwha 3y ago
I coded the AppleTalk stack for Apple's A/UX a year or two before the above conversation (I don't know if my code ever got used more widely at Apple) - it was all STREAMS - and pretty easy - create a DDP mux layer, open a str
418.
by Taniwha 3y ago
My Leaf has a button on the steering wheel that does it for free - it's called "ECO" - turn it off and zoom!
419.
by Taniwha 3y ago
Semiconductor memory was really really expensive until it hit the 16-64kbit/chip level and then it had a bit of a crisis because they suddenly all went a bit flaky (turned out to be alpha particles in the ceramic packages) - that was a
420.
by Taniwha 3y ago
You can run a piped i-cache faster (with a branch penalty ... but those machines also often had delay slots ...)

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