K1801BM1

4 ms·

1. 1.▲
   Dec F11 precise replica in Verilog, based on reverse engineering of real dies(github.com)

   3 points by K1801BM1 4y ago|0 comments
2. 2.▲
   by K1801BM1 6y ago

   There were no any problems to recognize n-MOS logic during the reverse - everything was quite obvious regardless the transistor sizes. And I just dropped the sizes in my schematics, it simplified the process a lot.