7 ms·

ARM details its new high-end CPU core, Cortex A72

62 points by aroch 11y ago

ChuckMcM 11y ago
Ok, this was a fun read. Two things stood out for me, one was that their partially out of order 8 issue pipeline and the other was their watts per instruction. For a long time Intel has been top dog in the "instructions per clock" or IPC space. So if you wanted performance you used their chips, except you paid for that by consuming a lot of power. ARM on the other hand has always tried to be the 'low power' chip which you could embed and run on batteries, and ultimately slower than the Intel architecture. But into this a couple of interesting market realities intruded, the most obvious was that at some point computers were "fast enough" for enough people to make a durable market for lower power machines. That really took off course in the smart phone and tablet market, but is inching into the "low end" server market. If ARM can get better at performance faster than Intel can get better at "low power" they can really put a dent into Intels market dominance in the larger computer space. And as a competitor with a completely different ISA they limit Intels ability to compete with lawsuits and/or changes to the "standard."
- stephencanon 11y ago
  "In more detailed terms, the Cortex A72 CPU pairs a three-wide, in-order front end with a five-wide, out-of-order back end (i.e. 8-issue)." ... That's not how it works. You don't add front-end and back-end width to get issue width. I know that Ars' architectural chops took a hit when Stokes left, but this is ridiculous. You take the minimum of the two[1], except that (per AnandTech's far better article [2]) the decoder is actually three fused macro-ops wide, not instructions, so the truth is actually somewhere between three and five instructions wide, depending on workload. [1] or maybe just the back-end width, since most modern CPUs can short-circuit decode in tight loops. [2] http://www.anandtech.com/show/9184/arm-reveals-cortex-a72-architecture-details http://www.anandtech.com/show/9184/arm-reveals-cortex-a72-ar...
  - DannyBee 11y ago
    I don't think you understand how this works at all. It's like when you add a few cortex m0's to your phone, and now you have a quad-core phone. (It's 8 issue. You can issue 8 instructions to it, it just doesn't process them all in a single cycle :P)
    - sliverstorm 11y ago
      8-issue means you can issue 8 things all together, all at once, all in a single cycle. The front end feeds the back end. 3-issue FE means you can give the BE 3 things per cycle. 5-issue BE means you can crunch 5 things from the FE per cycle. FE = branch prediction, decode, instruction cache BE = schedule, execute, load/store, data cache
      - stephencanon 11y ago
        I'm 99.9% sure that DannyBee understands this, because he's a smart guy, and that he's saying "that's how it works in marketing".
        sliverstorm 11y ago
        I don't know DannyBee to know his smarts- but I do see the potential sarcastic undertone :) I'll leave my comment though for the edification of others.
      - ChuckMcM 11y ago
        The question for me is whether you can retire the FE issue with a BE dispatch, and if so pull in another FE issue. So can you get the EU to the point where the all 5 of the BE units are subscribed and the three instructions in the front end have been pre-cracked waiting for a BE slot to free up? So ... Ins 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 ... FE: [ ] [ ] [Ins0] BE: [ ] [ ] [ ] [ ] [ ] FE: [ ] [ ] [Ins1] BE: [ ] [ ] [ ] [ ] [Ins0] FE: [ ] [Ins1] [Ins2] BE: [ ] [ ] [ ] [ ] [Ins0] FE: [Ins1] [Ins5] [Ins6] BE: [ ] [Ins3] [Ins4] [Ins2] [Ins0] FE: [Ins1] [Ins5] [Ins7] BE: [Ins6] [Ins3] [Ins4] [Ins2] [Ins0] And then maybe zero retires, that lets Ins1 proceed and it retires 1, 2, 3, 4, which lets 5 proceed, that lets 6 retire and then 7 proceeds. But until I get a closer look at the TRM this is all speculation.
- swalsh 11y ago
  "but is inching into the "low end" server market." I've seen people run reddit bots using a Raspberry pi. After a few months its cheaper then a VPS!
  - icebraining 11y ago
    Still takes quite a few months, you can get a VPS for $10/year (granted, with only 128MB, but it should be enough for a reddit bot).
- tedunangst 11y ago
  Isn't the "will arm get fast before Intel gets efficient?" question at least five years old? And don't we have some answers? http://www.theverge.com/2012/10/4/3447984/motorola-razr-i-review-intel-smartphone http://www.theverge.com/2012/10/4/3447984/motorola-razr-i-re...
  - angersock 11y ago
    there's also "will either happen before amd goes bankrupt"
    - tedunangst 11y ago
      They're certainly trying very hard to prevent that.
      - angersock 11y ago
        AMD's board? Yeah. I think they're trying to beat both to the punch. :(
  - Nelson69 11y ago
    There is a more interesting dimension to that question. ARM chips tend to come with more third party accelerators. And I think there are more silicon vendors that are willing to cram more cores on to a chip. In the server space I'd think that it will be Intel with furious single core performance and maybe 10 or 20 cores total vs ARM based with 32-64+cores and some hardware acceleration for some more operations. It will some how be an asymmetric comparison unless someone starts really knocking out high performance ARM cores.
- sliverstorm 11y ago
  TCO is supposedly becoming an increasingly dominant metric in the sever space, of which FLOPS/watt is probably more important than IPC. So in many server segments a class-leading "WPI" (we need some kind of name) with decent IPC could actually lead ARM to victory.
  - white-flame 11y ago
    Realistically, how important is FLOPS to most servers? File servers, web servers, database servers, authentication servers... none of them tend to be heavy on floating point. Sure, HPC is all about FLOPS, and desktops tend to use quite a bit for presentation nowadays, but I would consider memory bandwidth, I/O bandwidth, thread scaling, and single-thread performance non-FP metrics such as branch latency to be much more important in the general server market.
    - sliverstorm 11y ago
      Feel free to mentally insert your performance metric of choice. FLOPS, IPC, branch latency, etc. There is no one all-encapsulated benchmark that I know of. I say "FLOPS" as an artifact of the past.
  - ksec 11y ago
    Well I dont think TCO really flavor ARM at all. If you look at Server as a whole, putting in the ECC RAM, HDD or SSD and Network, the CPU power/performance scaling work much better in Intel's flavor.
- minthd 11y ago
  Another element that's being added to the mix is security. From a country's perspective, open cores and and control on chip design is valuable here. And that's exactly what the Chinese government is doing: "encouraging" their private sector to move away from intel's architecture to IBM's open power (and they'll probably won't mind an open ARM). And who knoww, maybe later we'll see other countries shift to that kind of strategy.
  - digi_owl 11y ago
    Reminds me of the Z80 and how everyone and their dog was making it and computers based on it. Then came the PC clones and most nations stopped making their own stuff and just imported parts, or whole computers, from Asia.
- InclinedPlane 11y ago
  That's largely immaterial in the short to medium term, in the non-mobile space anyway. Intel has superior fab technology and vastly superior fab capacity, attaining parity with Intel (which would be difficult due to being behind in process technology) would still put you at a disadvantage, you'd need to be significantly better than Intel to make up for Intel's other advantages.
- higherpurpose 11y ago
  > If ARM can get better at performance faster than Intel can get better at "low power" they can really put a dent into Intels market dominance in the larger computer space. Even if it remains slightly behind on that metric, ARM is is basically untouchable by Intel in the price/performance metric. Many people, including the author seem to say stuff like "the next Core-M generation will totally beat this anyway!" Except, Core M is nowhere near the price/performance of Cortex A72. That makes Core M uncompetitive in whatever markets the two would have to co-exist (which they don't right now, because Core M is only used in $1,000+ Windows or Mac OS X ultrabooks). Even Atom can't be competitive on price/performance. The real (unsubsidized) gap between the two is somewhere around 2x and has remained that way since Atom's existence. The only way Atom can pretend to be competitive on price in the mobile market is because it's subsidized by Intel while it overcharges for the new Atom-based Celerons and Pentiums (Intel charges for them as much as it used to charge for the Haswell versions, and what it would've charged this year for the Broadwell versions - but those don't exist anymore).
M8 11y ago
How soon will we have 16/32 core mobile processors? It would be nice if something will force the industry to investigate alternative parallel programming paradigms.
- robert_foss 11y ago
  The workloads don't support that many threads. 8-core A53 chips exist, but they don't perform anywhere near what a 2-core A57 does for typical mobile workloads.
  - DannyBee 11y ago
    Yes, it doesn't make a whole heck of a lot of sense to add cores when they aren't cpu bound at all. The idea that "the slow cores can just handle the background stuff" makes little to no sense in practice. The most power effective thing to do is not add more cores (and all that entails), but get done the work something wants done as fast as humanly possible so you can go back to sleep. Having slow cores handle this for you sounds great in theory. In practice, it's been a huge bust (The one exception being dedicated-function coprocessors, etc) This is one reason that, for example, higher speed wifi/etc chipsets often become less power intensive than the old chipsets (past the initial spike from it being new hardware) - they can sleep more
    - jacquesm 11y ago
      For low end servers it would make sense though.
    - CHY872 11y ago
      Do you have any numbers re "little to no sense in practice"? What I've heard suggests that the tradeoffs behind high performance ARM lead to significantly worse power efficiency to the benefit of peak performance; which means that a core like the A53 ends being a very attractive proposition for power saving. Certainly I don't know why ARM would recommend their big.LITTLE architecture (or at least why people would use it) unless it did. Furthermore, Amdahl's law means that even in theory it should be advantageous for performance to include a few extra low power cores to boost peak performance (above adding a larger high power core).
StillBored 11y ago
A72 is nice, but to really compete in the server market I think they need another product. One that drops the performance/watt metric for the "as fast as it goes" metric. That is because while a lot of people are going to want efficient chips, if ARM really takes off there will definitely be people who want to share a binary with a CPU that is screaming fast.
- duaneb 11y ago
  > A72 is nice, but to really compete in the server market I think they need another product. One that drops the performance/watt metric for the "as fast as it goes" metric. That seems like vertical scaling instead of horizontal scaling. I'm not sure how much money there is in the former market—maybe look at mainframe markets. Horizontal scaling is a much easier sell, especially for data centers. I will put money on the fact that Facebook will eventually invest heavily in this architecture design.
- tw04 11y ago
  They will literally NEVER beat Intel at the speed game in servers and they know it. If you want blazing fast, you've already got a market leader that's held the crown almost their entire existence.
  - StillBored 11y ago
    ? I'm not sure that is accurate. Before the PPRO, there were the RISC vendors, which overwhelmingly were significantly faster. In the early 2000's there was AMD, for about 5 years was faster in nearly every regard. Still today, you have things like the POWER 8, which while not necessarily faster for every workload definitely can beat Intel's offerings for certain workloads. So at the moment it seems to be similar to the early 80's when it wasn't clear cut who had the fastest CPU because it depended on workload. Hence my expectation that ARM will get there, if they put in the effort.
faragon 11y ago
Issuing up to 8 instructions per clock (3 in order, 5 OoO) is single-thread serious performance. It looks like is going to be much better than the NVidia Denver CPU (also 8 instruction/cycle, but all of them in-order). It will be scary comparing 20-70$ ARM CPUs performing similar to Intel's in the 100-200$ price range.
chisleu 11y ago
"There's also a reworked 3-way L1 cache that's "almost as powerful as direct-mapped cache," and a much smaller (~10 percent) and reorganized dispatch unit." What? I'm guessing it is a typo for a 2/4 way set associative cache, or something I know not what.

62 points by aroch 11y ago

Ok, this was a fun read. Two things stood out for me, one was that their partially out of order 8 issue pipeline and the other was their watts per instruction. For a long time Intel has been top dog in the "instructions per clock" or IPC space. So if you wanted performance you used their chips, except you paid for that by consuming a lot of power. ARM on the other hand has always tried to be the 'low power' chip which you could embed and run on batteries, and ultimately slower than the Intel architecture. But into this a couple of interesting market realities intruded, the most obvious was that at some point computers were "fast enough" for enough people to make a durable market for lower power machines. That really took off course in the smart phone and tablet market, but is inching into the "low end" server market. If ARM can get better at performance faster than Intel can get better at "low power" they can really put a dent into Intels market dominance in the larger computer space. And as a competitor with a completely different ISA they limit Intels ability to compete with lawsuits and/or changes to the "standard."

stephencanon 11y ago
"In more detailed terms, the Cortex A72 CPU pairs a three-wide, in-order front end with a five-wide, out-of-order back end (i.e. 8-issue)." ... That's not how it works. You don't add front-end and back-end width to get issue width. I know that Ars' architectural chops took a hit when Stokes left, but this is ridiculous. You take the minimum of the two[1], except that (per AnandTech's far better article [2]) the decoder is actually three fused macro-ops wide, not instructions, so the truth is actually somewhere between three and five instructions wide, depending on workload. [1] or maybe just the back-end width, since most modern CPUs can short-circuit decode in tight loops. [2] http://www.anandtech.com/show/9184/arm-reveals-cortex-a72-architecture-details http://www.anandtech.com/show/9184/arm-reveals-cortex-a72-ar...
- DannyBee 11y ago
  I don't think you understand how this works at all. It's like when you add a few cortex m0's to your phone, and now you have a quad-core phone. (It's 8 issue. You can issue 8 instructions to it, it just doesn't process them all in a single cycle :P)
  - sliverstorm 11y ago
    8-issue means you can issue 8 things all together, all at once, all in a single cycle. The front end feeds the back end. 3-issue FE means you can give the BE 3 things per cycle. 5-issue BE means you can crunch 5 things from the FE per cycle. FE = branch prediction, decode, instruction cache BE = schedule, execute, load/store, data cache
    - stephencanon 11y ago
      I'm 99.9% sure that DannyBee understands this, because he's a smart guy, and that he's saying "that's how it works in marketing".
      - sliverstorm 11y ago
        I don't know DannyBee to know his smarts- but I do see the potential sarcastic undertone :) I'll leave my comment though for the edification of others.
    - ChuckMcM 11y ago
      The question for me is whether you can retire the FE issue with a BE dispatch, and if so pull in another FE issue. So can you get the EU to the point where the all 5 of the BE units are subscribed and the three instructions in the front end have been pre-cracked waiting for a BE slot to free up? So ... Ins 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 ... FE: [ ] [ ] [Ins0] BE: [ ] [ ] [ ] [ ] [ ] FE: [ ] [ ] [Ins1] BE: [ ] [ ] [ ] [ ] [Ins0] FE: [ ] [Ins1] [Ins2] BE: [ ] [ ] [ ] [ ] [Ins0] FE: [Ins1] [Ins5] [Ins6] BE: [ ] [Ins3] [Ins4] [Ins2] [Ins0] FE: [Ins1] [Ins5] [Ins7] BE: [Ins6] [Ins3] [Ins4] [Ins2] [Ins0] And then maybe zero retires, that lets Ins1 proceed and it retires 1, 2, 3, 4, which lets 5 proceed, that lets 6 retire and then 7 proceeds. But until I get a closer look at the TRM this is all speculation.
swalsh 11y ago
"but is inching into the "low end" server market." I've seen people run reddit bots using a Raspberry pi. After a few months its cheaper then a VPS!
- icebraining 11y ago
  Still takes quite a few months, you can get a VPS for $10/year (granted, with only 128MB, but it should be enough for a reddit bot).
tedunangst 11y ago
Isn't the "will arm get fast before Intel gets efficient?" question at least five years old? And don't we have some answers? http://www.theverge.com/2012/10/4/3447984/motorola-razr-i-review-intel-smartphone http://www.theverge.com/2012/10/4/3447984/motorola-razr-i-re...
- angersock 11y ago
  there's also "will either happen before amd goes bankrupt"
  - tedunangst 11y ago
    They're certainly trying very hard to prevent that.
    - angersock 11y ago
      AMD's board? Yeah. I think they're trying to beat both to the punch. :(
- Nelson69 11y ago
  There is a more interesting dimension to that question. ARM chips tend to come with more third party accelerators. And I think there are more silicon vendors that are willing to cram more cores on to a chip. In the server space I'd think that it will be Intel with furious single core performance and maybe 10 or 20 cores total vs ARM based with 32-64+cores and some hardware acceleration for some more operations. It will some how be an asymmetric comparison unless someone starts really knocking out high performance ARM cores.
sliverstorm 11y ago
TCO is supposedly becoming an increasingly dominant metric in the sever space, of which FLOPS/watt is probably more important than IPC. So in many server segments a class-leading "WPI" (we need some kind of name) with decent IPC could actually lead ARM to victory.
- white-flame 11y ago
  Realistically, how important is FLOPS to most servers? File servers, web servers, database servers, authentication servers... none of them tend to be heavy on floating point. Sure, HPC is all about FLOPS, and desktops tend to use quite a bit for presentation nowadays, but I would consider memory bandwidth, I/O bandwidth, thread scaling, and single-thread performance non-FP metrics such as branch latency to be much more important in the general server market.
  - sliverstorm 11y ago
    Feel free to mentally insert your performance metric of choice. FLOPS, IPC, branch latency, etc. There is no one all-encapsulated benchmark that I know of. I say "FLOPS" as an artifact of the past.
- ksec 11y ago
  Well I dont think TCO really flavor ARM at all. If you look at Server as a whole, putting in the ECC RAM, HDD or SSD and Network, the CPU power/performance scaling work much better in Intel's flavor.
minthd 11y ago
Another element that's being added to the mix is security. From a country's perspective, open cores and and control on chip design is valuable here. And that's exactly what the Chinese government is doing: "encouraging" their private sector to move away from intel's architecture to IBM's open power (and they'll probably won't mind an open ARM). And who knoww, maybe later we'll see other countries shift to that kind of strategy.
- digi_owl 11y ago
  Reminds me of the Z80 and how everyone and their dog was making it and computers based on it. Then came the PC clones and most nations stopped making their own stuff and just imported parts, or whole computers, from Asia.
InclinedPlane 11y ago
That's largely immaterial in the short to medium term, in the non-mobile space anyway. Intel has superior fab technology and vastly superior fab capacity, attaining parity with Intel (which would be difficult due to being behind in process technology) would still put you at a disadvantage, you'd need to be significantly better than Intel to make up for Intel's other advantages.
higherpurpose 11y ago
> If ARM can get better at performance faster than Intel can get better at "low power" they can really put a dent into Intels market dominance in the larger computer space. Even if it remains slightly behind on that metric, ARM is is basically untouchable by Intel in the price/performance metric. Many people, including the author seem to say stuff like "the next Core-M generation will totally beat this anyway!" Except, Core M is nowhere near the price/performance of Cortex A72. That makes Core M uncompetitive in whatever markets the two would have to co-exist (which they don't right now, because Core M is only used in $1,000+ Windows or Mac OS X ultrabooks). Even Atom can't be competitive on price/performance. The real (unsubsidized) gap between the two is somewhere around 2x and has remained that way since Atom's existence. The only way Atom can pretend to be competitive on price in the mobile market is because it's subsidized by Intel while it overcharges for the new Atom-based Celerons and Pentiums (Intel charges for them as much as it used to charge for the Haswell versions, and what it would've charged this year for the Broadwell versions - but those don't exist anymore).

M8 11y ago

How soon will we have 16/32 core mobile processors? It would be nice if something will force the industry to investigate alternative parallel programming paradigms.

robert_foss 11y ago
The workloads don't support that many threads. 8-core A53 chips exist, but they don't perform anywhere near what a 2-core A57 does for typical mobile workloads.
- DannyBee 11y ago
  Yes, it doesn't make a whole heck of a lot of sense to add cores when they aren't cpu bound at all. The idea that "the slow cores can just handle the background stuff" makes little to no sense in practice. The most power effective thing to do is not add more cores (and all that entails), but get done the work something wants done as fast as humanly possible so you can go back to sleep. Having slow cores handle this for you sounds great in theory. In practice, it's been a huge bust (The one exception being dedicated-function coprocessors, etc) This is one reason that, for example, higher speed wifi/etc chipsets often become less power intensive than the old chipsets (past the initial spike from it being new hardware) - they can sleep more
  - jacquesm 11y ago
    For low end servers it would make sense though.
  - CHY872 11y ago
    Do you have any numbers re "little to no sense in practice"? What I've heard suggests that the tradeoffs behind high performance ARM lead to significantly worse power efficiency to the benefit of peak performance; which means that a core like the A53 ends being a very attractive proposition for power saving. Certainly I don't know why ARM would recommend their big.LITTLE architecture (or at least why people would use it) unless it did. Furthermore, Amdahl's law means that even in theory it should be advantageous for performance to include a few extra low power cores to boost peak performance (above adding a larger high power core).

StillBored 11y ago

A72 is nice, but to really compete in the server market I think they need another product. One that drops the performance/watt metric for the "as fast as it goes" metric. That is because while a lot of people are going to want efficient chips, if ARM really takes off there will definitely be people who want to share a binary with a CPU that is screaming fast.

duaneb 11y ago
> A72 is nice, but to really compete in the server market I think they need another product. One that drops the performance/watt metric for the "as fast as it goes" metric. That seems like vertical scaling instead of horizontal scaling. I'm not sure how much money there is in the former market—maybe look at mainframe markets. Horizontal scaling is a much easier sell, especially for data centers. I will put money on the fact that Facebook will eventually invest heavily in this architecture design.
tw04 11y ago
They will literally NEVER beat Intel at the speed game in servers and they know it. If you want blazing fast, you've already got a market leader that's held the crown almost their entire existence.
- StillBored 11y ago
  ? I'm not sure that is accurate. Before the PPRO, there were the RISC vendors, which overwhelmingly were significantly faster. In the early 2000's there was AMD, for about 5 years was faster in nearly every regard. Still today, you have things like the POWER 8, which while not necessarily faster for every workload definitely can beat Intel's offerings for certain workloads. So at the moment it seems to be similar to the early 80's when it wasn't clear cut who had the fastest CPU because it depended on workload. Hence my expectation that ARM will get there, if they put in the effort.

faragon 11y ago

Issuing up to 8 instructions per clock (3 in order, 5 OoO) is single-thread serious performance. It looks like is going to be much better than the NVidia Denver CPU (also 8 instruction/cycle, but all of them in-order). It will be scary comparing 20-70$ ARM CPUs performing similar to Intel's in the 100-200$ price range.

chisleu 11y ago

"There's also a reworked 3-way L1 cache that's "almost as powerful as direct-mapped cache," and a much smaller (~10 percent) and reorganized dispatch unit." What? I'm guessing it is a typo for a 2/4 way set associative cache, or something I know not what.