This is a little overstated, typically: 1) Cisc code isn't really any better in some languages, e.g. C++, which uses heavy code duplication. 2) The instruction

This is a little overstated, typically: 1) Cisc code isn't really any better in some languages, e.g. C++, which uses heavy code duplication. 2) The instruction cache these days is pretty fucking huge. Any tight loop will fit in it just fine, and it's hardly like you're thrashing the cache often at all (except, again in cases where you would already be thrashing the cache on CISC). It's very difficult to find a scenario where RISC is held back by the instruction cache where CISC would not be. Obviously, if you shrink the cache and use -Os and try not to duplicate code, you could probably run into this scenario more often, but it's just not a very relevant argument. See: why people don't bother to use thumb instructions on ARM. It's very rarely the bottleneck for a chunk of code. In fact, the only place I'd expect to see it make a difference is either a) with dynamic translation, ala Qemu, where you might rapidly thrash a lot of code pages, and b) on application load on heavily duplicated code (again, think C++). In fact, I'd argue that the RISC vs CISC argument is less relevant than ever these days: + Compilers hide more assembly than ever, removing the need for human readability of underlying instructions. + Memory bandwidth and branch prediction are both larger issue on both architectures than decoding of instructions. + Intel has shown low-power CISC processors are in fact viable (atom and celeron are both respectable), although it looks difficult to get a risc-like performance/watt out of them. + Most modern cisc code translates VERY CLEANLY to a risc-like microcode. Assuming the translation cache is hot, translation really shouldn't add much overhead. No, I think the major downsides of CISC are maintainability (both in terms of ISA and actually laying down logic) and in the difficulty of correct implementation semantics across diverse implementations, something I'm frankly amazed at Intel's ability to reliably pull off.