4 ms·
The point is - you can verify it yourself. Without trusting anybody else. Dumping the firmware means you can ensure it's not been modified (presumably from whe
by tribaal 12y ago
The point is - you can verify it yourself. Without trusting anybody else.
Dumping the firmware means you can ensure it's not been modified (presumably from when you uploaded it to the device yourself).
Being able to inspect components means you can ensure it's still exactly as you built it. And if you haven't, you can visually check that it does what it says it does.
If you're not technically competent to make this verification, you can ask somebody you trust and who is to do it for you.
- gcommer 12y agoNone of the images show the other side of the board, but unless every trace is visible, it will be difficult to non-destructively inspect. If its only a 2 layer board then this just means scratching off the white silkscreen, which wouldn't be too bad. If its more than 2 layers, you would have to have access to an X-ray machine.
- Taniwha 12y agoit's a two layer board - no buried wires or vias - by design there are very few wires on the bottom layer, none under the noise source (we want to contain the noise) - you can see all the wires without removing the solder mask just by holding it in the right light we'll be publishing the layout files of course
- joezydeco 12y agoHow do we verify the internal microcode and switch fabric of the TI CC2531? IMO it seems like simply trusting the large block diagram that says "USB PHY" is a very weak point in the design.
- WaywardGeek 12y agoStill, a USB phy is required. How would you solve this problem? Would a FTDI USB chip be more palatable?
- joezydeco 12y agoWho knows. Perhaps a Verilog implementation on an FPGA? Discrete gates and GPIOs galore? Sarcasm and FTDI chips aside, I'm hoping the point was clear. Guess it wasn't. Using USB as the physical transport from dongle to CPU just introduces more black boxes in a system where everyone was bragging about no black boxes. But since we're past the age of parallel ports and discrete GPIOs on these machines, there doesn't seem to be an easy answer.