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As noted in the article, Apple solved this problem six years ago by simply adding an x86-compatible memory ordering mode to their chip when x86 emulation became
by modeless 16d ago
As noted in the article, Apple solved this problem six years ago by simply adding an x86-compatible memory ordering mode to their chip when x86 emulation became important. Yet another way Apple's chips lead the industry.
- saagarjha 16d agoWell well well “modeless” has decided to finally see the light of modes
- tancop 16d agoArm was never modeless. Thumb is a separate encoding with different instruction semantics and Jazelle ran Java bytecode. Both of them need a special branch instruction to enter. What they don't have is legacy modes like real, v8086 or native 16/32 protected that have no reason to exist when a CPU in long mode can run 16 and 32 bit code (in compatibility sub mode) just fine.
- sgerenser 16d agoIt was a joke based on the commenter’s username.
- gavinsyancey 16d agoAnd as noted in the article, while that helps a lot with most of the issues, there are some corner-cases they still don't handle.
- MBCook 16d agoYeah, I thought that was interesting. Knowing Apple they must’ve profiled a ton of code and decided the hit from not “fixing“ that wasn’t worth enough. The M chips were already so much faster then the Intel chips Apple was using before (except on Mac Pro maybe) that it was probably still a net win.
- karel-3d 16d agoThe word "simply" is doing a lot of work there
- mitxela 16d agoA legitimate benefit of vertical integration. They control their own CPUs so they can just do that. Linux has to run on whatever it's given.
- astrange 16d agoIt's not the only such CPU, Fujitsu's also have TSO.