2 ms·
That layout does not look very good: https://github.com/drandyhaas/KiCadRoutingTools/blob/main/docs/routed_all.png https://github.com/drandyhaas/KiCadRoutingTo
by amelius 19d ago
That layout does not look very good:
https://github.com/drandyhaas/KiCadRoutingTools/blob/main/docs/routed_all.png https://github.com/drandyhaas/KiCadRoutingTools/blob/main/do...
I'm curious if this even works at high speed though I'm seeing what appears to be length-matched traces. Is the tool using an EM simulator in the process?
- tonyarkles 19d agoI've installed it this morning to play around with on some low-speed designs before trying a high-speed design. Looking at that specific screenshot you posted there... that looks partially like a floor planning problem to me. Looking up the part number, that Ti90G529 is an FPGA, which also suggests that the overall routing could potentially get a lot better if the pads from the part on the left-hand side were shifted to all be on the "top" or "bottom" of U3 instead of divided across it the way it is right now. My first attempt on a low-speed not-dense board came out OK. There were a few odd choices, but I don't expect perfection from auto-routers. If nothing else, auto-routers are a good way to double-check that your floor planning is OK, even if you then rip up the auto-routed traces and hand route them instead.