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Nothing can be as power efficient as an ASIC, which is designed for a specific purpose, instead of being a programmable device intended to be suitable for a lar
by adrian_b 2mo ago
Nothing can be as power efficient as an ASIC, which is designed for a specific purpose, instead of being a programmable device intended to be suitable for a large class of applications.
A GPU is much more efficient than an FPGA for what a GPU does. On the other hand for applications for which the set of primitive operations implemented in hardware by a GPU is not a good fit, an FPGA can be much more power efficient than a GPU.
For applications that involve a massive amount of computations with FP32, FP16 or BF16 numbers, for which GPUs have special hardware execution units, i.e. for training and for inference with non-quantized models, there is no chance for an FPGA to be more efficient.
If the GPU is recent enough to have good support for more heavily quantized data types, e.g. INT8, FP8, NVFP4 etc. an FPGA also does not have chances to be competitive.
An FPGA could be more efficient than a GPU if either it is some special AI-oriented FPGA, which instead of having traditional arithmetic units oriented for DSP applications, has execution units implementing the quantized data types popular in ML/AI, or if it implements inference using some new not yet standardized data type, for which GPUs do not have dedicated support yet.
- cgyvbunji 2mo agoYeah but then it's basically an AI ASIC with an FPGA block inside it. Basically the less FPGA-like an FPGA is, ie the more dedicated silicon in the FPGA for the task in question, the more power efficient it is, because custom logic in an FPGA is done in LUTs which is RAM and RAM is way way more power hungry than actual logic gates, and the fabric is apparently power hungry too. It's unfortunate to me because I like FPGAs and wish they weren't so niche, but they are inherently limited in this way.
- adrian_b 2mo agoI agree.
- imtringued 2mo agoIf you understood FPGAs you wouldn't think of them as incredibly niche. The more application specific you get, the smaller the total volume of chips. The very nature of application specifity ruins the economics of ASICs. Every time someone tells me an ASIC is more energy efficient I'm thinking, you just ruined the business case. The vast majority of application specific designs are not economically viable unless you use FPGAs to implement them.
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- cgyvbunji 2mo ago> The more application specific you get, the smaller the total volume of chips Sure, and that is the definition of niche. FPGAs are niche. You could have made a good point that an application specific design that already requires an FPGA might want to now also have a local LLM, so putting the LLM right on the FPGA might be the most expedient option in that case. Other than that, I don't think people are reaching for FPGAs to do LLM training or inference in general because I don't think it can be cost effective vs other options.