did I understand the article correctly? "Because of all the peripheral circuits and all the vertical channels, a single gigabyte of HBM consumes more than thre

did I understand the article correctly? "Because of all the peripheral circuits and all the vertical channels, a single gigabyte of HBM consumes more than three times the wafer capacity that a gigabyte of DDR or LPDDR does. Every gigabyte of HBM produced is, in effect, three gigabytes of commodity memory not produced." Is this true or conflating wafer area with process steps? If the bottleneck isn't process steps but wafer area, you'd expect the semiconductor boule growers to rake in all the profit, not the memory makers themselves (although they would see more revenue). I'm not hearing about Umicore or other semiconductor corps raking in big under a wafer shortage. Thats why I ask the question if this is actually correct. If correct, it really makes one wonder what would be more productive for machine learning community X PB of HBM vs 3X PB of conventional (LP)DDR RAM, or somewhere in between. By giving a couple of big players carte blanche financially, has allowed the decision to divide in 3 global memory capacity (in units of terrabytes manufactured per day say)? The singularity that slows itself down?