3 ms·
Can surely get more bandwidth but the it's less useful because it will not be directly accessible by the CPU anymore.
by Rohansi 6mo ago
Can surely get more bandwidth but the it's less useful because it will not be directly accessible by the CPU anymore.
- WeebLabs 6mo agoPSRAM is a possibility that I have explored for offloading the delay line buffers, which occupy quite a significant chunk of SRAM at the moment. It should be fast enough.
- mazurnification 6mo agoI believe PSRAM is directly accessible by CPU (there is even cache for PSRAM). Or am I missing something?
- Rohansi 6mo agoLerc was referring to driving multiple PSRAM chips from a single Pico with PIO/DMA. The CPU will only work with a single PSRAM chip.
- Lerc 6mo agoYes, I was thinking of it more like bank switching. Although, going back to the start of the thread where the suggestion was adding more RAM to future chips perhaps the request could be for support for multiple channels in the future. It;s the age old question of parallel Vs serial Vs multi channel serial.