3 ms·
I always thought once we have the models figured out, getting the meat of it into an FPGA was probably the logical next step. They seemed to have skipped that a
by exabrial 7mo ago
I always thought once we have the models figured out, getting the meat of it into an FPGA was probably the logical next step. They seemed to have skipped that and are directly writing the program as ASIC (ROM). Pretty wild.
- amelius 7mo agoYes, FPGAs are not sufficiently dense. Because of their programmability they sacrifice a lot of capacity. The factor is something like 5x-10x.