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Not just that, their device "z1060" doesn't exist outside this blog post. We literally don't know what it is.
by imtringued 1y ago
Not just that, their device "z1060" doesn't exist outside this blog post. We literally don't know what it is.
- adapteva 1y agoDocumentation can be found in two places. What else do you need to know? https://github.com/siliconcompiler/logiklib/tree/main/logiklib/zeroasic/z1060 https://github.com/siliconcompiler/logiklib/tree/main/logikl... https://github.com/zeroasiccorp/wildebeest/tree/main/architecture/z1060 https://github.com/zeroasiccorp/wildebeest/tree/main/archite...
- someguydave 1y agoah so this is misdirection - what they are really showcasing is their own new FPGA asic
- amluto 1y agoThey’re showcasing their open-source stack, built on existing tools, for their own FPGA. Imagine if, 25 years ago, a company had designed a new CPU ISA and core and, as part of the development process, ported GCC and done a nice job tuning the existing optimization passes, with the intention of the GCC port being the primary toolchain that commercial users would use. They could write a blog post about it, and it would have been great. Maybe they even would have acknowledged in the blog post that the stack included binutils :)
- adapteva 1y agoThank you, comment made my day:-)
- deleted 1y ago[deleted]
- someguydave 1y agoin that case, such a company would be wise to include the fact that the "z1060" is a new CPU instead of failing to even mention what it is in their "new GCC port" press release page