5 ms·

Here be dragons: Preventing static damage, latchup, and metastability in the 386

100 points by todsacerdoti 1y ago

kens 1y ago
Author here if you have questions about some obscure circuitry in the 386.
- symaxian 1y ago
  Are the techniques described in the article still in use today or have they been superseded?
  - kens 1y ago
    My understanding is that modern techniques are similar, but the tradeoffs have changed as chip voltages become lower and transistors become smaller. (Admittedly, I don't know a lot about modern techniques.) This article, from a company that designs ESD circuits, describes various modern techniques: https://monthly-pulse.com/2022/03/29/introduction-esd-protection-concepts-for-i-os/ https://monthly-pulse.com/2022/03/29/introduction-esd-protec...
  - lpribis 1y ago
    Yes, using 2 or three flip flops in series to prevent metastability is still common practice today. As is using diodes in that configuration for esd protection.
- Taniwha 1y ago
  I think the metastability can't destroy a chip thing is not true, you can get a flop into a state where it's oscillating at whatever freq the internal feedback path is (maybe up to GHz) rather than resolving to a stable 1 or 0. That can propagate to adjacent flops resulting in a bunch of flops pulling too much current. Like anything to do with metastability this is a statistical thing - it can do this, but it's highly unlikely. I worked on a chip in the mid 90s where we were very careful about our clock crossings, dropped in special high-gain anti-metastability flops, designed logic to reduce synchronised signal frequencies etc etc all the good stuff - we calculated that we'd see a failure (and mostly that would be a pixel burble on the screen) every year or so - at the time Win95 couldn't stay up a week so management decided to ship it
  - kens 1y ago
    Fair enough. I changed the text to "probably won't destroy".
  - ronsor 1y ago
    Windows 95 could stay up for a maximum of 49.7 days, provided that no horribly-written driver or application took down the system sooner.
    - burnt-resistor 1y ago
      In the late 90's, I administered the software test lab including UNIX workstations and Windows beige boxes I had build in addition to some servers, the LAN, and WAN for a nuclear engineering consultancy. There were a few Windows 95/98 boxes that were imaged for testing and contained 4 handy-dandy clones that could be copied (prior to widespread usage of Ghost). It would regularly stay running for a month at a time when disused, but I believed it was set to simply reboot to the first primary partition on BSOD. I bet at least one of event logs probably contained entries like these because centralized syslog/log shipping and monitoring weren't set up.
  - burnt-resistor 1y ago
    CS/EE here. Malfunction still leads to dragons overall. The problems of sequential logic looping to itself and talking to the outside world under various conditions include (but aren't limited to): getting predictable initialization, predictable durability, matching input impedance, and creating chips with characterizable and reliable setup/hold/delay/etc. times. These days, I leave chip design to chip designers and barely do silly things like create seven (7) total 4 pin to 3 pin Arduino PWM fan controllers with MOSFETs, MOSFET protection and noise reduction circuitry. See, I have to keep the fans fed with over 4 volts so the tach signal continues and the storage array's BMC doesn't freak out. (The fans characteristics I needed aren't/weren't available in 4 pin PWM.) I try not shock myself like ElectroBOOM or release too much magic smoke from gear or vintage gear that might not be replaceable.
- mabster 1y ago
  Just a big thanks from someone lurking on your blog for a while now. Every article has been fascinating deep insights!
cruffle_duffle 1y ago
“Intel recommends an anti-static mat and a grounding wrist strap when installing a processor to avoid the danger of static electricity, also known as Electrostatic Discharge or ESD.1” You know back when I built my computers, not once did I ever use any kind of static electricity discharge “system”. No wrist strap, no mat, no anything. And I don’t know anybody who did. Has anybody ever actually destroyed a chip with static electricity? (Of course it could be the climate I lived in as well)
- the-grump 1y ago
  You will fry something if you don't use anti static measures and work on enough boards. Moisture, clothing, habits play a role so it's highly variable.
  - LegionMammal978 1y ago
    It's funny, back in an earlier job, I'd keep a board plugged into a programmer, which in turn was plugged into a USB port on my laptop. Whenever I left the restroom, my hands would be slightly wet, and touching the laptop would give me a small shock. Somehow, this shock would reset the board every time, even through the indirect connection. I'm surprised that nothing ever actually got fried in that job. (Except for a company laptop that mysteriously bricked itself after I tried rebooting it.)
    - the-grump 1y ago
      That's actually fine because you were probably going straight to ground. When things are properly grounded and the small components are covered, the current will flow through the thick ground conduit (the laptop body, thick copper on the PCB, eventually into the power cable). What you'd like to avoid is releasing that static charge through a tiny component on the board that couldn't handle the surge.
- forgetfreeman 1y ago
  Yeah I'm pretty sure I've seen processors and memory both get eaten by ESD. Of course its impossible to prove but techs that didn't use protection had higher RMA rates on components so it gots to a point where the conclusion drew itself.
userbinator 1y ago
But as high-power transistors were developed, SCRs fell out of favor. In particular, once an SCR is turned on, it stays on until power is removed or reversed; this makes SCRs harder to use than transistors. SCRs, also known as thyristors, are still widely used in very high power applications.
- adrian_b 1y ago
  Thyristors in the strict sense of the word, i.e. SCRs, are still used only in a very small fraction of the applications that were dominated by them a few decades ago. Classic thyristors are useful only for controlling 50/60 Hz AC consumers. Many applications that were done in the past with normal thyristors, for lack of alternatives, like electric motor control, are done now with GTO (gate turn-off) thyristors or with IGBTs (insulated gate bipolar transistors) or with silicon carbide transistors. Even the use of GTO thyristors is regressing. If any thyristors will still be used in the future, they will use silicon carbide, with which they can be much faster than the silicon thyristors.
- mrheosuper 1y ago
  in AC power network, the power is turn off 100/120 times every second, so using SCR is perfectly fine.
gttalbot 1y ago
Question for @kens -- this circuit you found, how would Intel have designed and tested this?
- kens 1y ago
  There are various test procedures. For ESD, there are official tests like the Human Body Model, where a capacitor is charged to a specific voltage and discharged into the circuit. Similarly, for latchup, there are official tests that apply specific pulses. Metastability can be tested by applying asynchronous signals, but I'm not sure how that scales when the MTBF is very large. Human Body Model: https://en.wikipedia.org/wiki/Human-body_model https://en.wikipedia.org/wiki/Human-body_model Latchup testing: https://www.ti.com/lit/wp/scaa124/scaa124.pdf?ts=1755513899304 https://www.ti.com/lit/wp/scaa124/scaa124.pdf?ts=17555138993...

100 points by todsacerdoti 1y ago

kens 1y ago

Author here if you have questions about some obscure circuitry in the 386.

symaxian 1y ago
Are the techniques described in the article still in use today or have they been superseded?
- kens 1y ago
  My understanding is that modern techniques are similar, but the tradeoffs have changed as chip voltages become lower and transistors become smaller. (Admittedly, I don't know a lot about modern techniques.) This article, from a company that designs ESD circuits, describes various modern techniques: https://monthly-pulse.com/2022/03/29/introduction-esd-protection-concepts-for-i-os/ https://monthly-pulse.com/2022/03/29/introduction-esd-protec...
- lpribis 1y ago
  Yes, using 2 or three flip flops in series to prevent metastability is still common practice today. As is using diodes in that configuration for esd protection.
Taniwha 1y ago
I think the metastability can't destroy a chip thing is not true, you can get a flop into a state where it's oscillating at whatever freq the internal feedback path is (maybe up to GHz) rather than resolving to a stable 1 or 0. That can propagate to adjacent flops resulting in a bunch of flops pulling too much current. Like anything to do with metastability this is a statistical thing - it can do this, but it's highly unlikely. I worked on a chip in the mid 90s where we were very careful about our clock crossings, dropped in special high-gain anti-metastability flops, designed logic to reduce synchronised signal frequencies etc etc all the good stuff - we calculated that we'd see a failure (and mostly that would be a pixel burble on the screen) every year or so - at the time Win95 couldn't stay up a week so management decided to ship it
- kens 1y ago
  Fair enough. I changed the text to "probably won't destroy".
- ronsor 1y ago
  Windows 95 could stay up for a maximum of 49.7 days, provided that no horribly-written driver or application took down the system sooner.
  - burnt-resistor 1y ago
    In the late 90's, I administered the software test lab including UNIX workstations and Windows beige boxes I had build in addition to some servers, the LAN, and WAN for a nuclear engineering consultancy. There were a few Windows 95/98 boxes that were imaged for testing and contained 4 handy-dandy clones that could be copied (prior to widespread usage of Ghost). It would regularly stay running for a month at a time when disused, but I believed it was set to simply reboot to the first primary partition on BSOD. I bet at least one of event logs probably contained entries like these because centralized syslog/log shipping and monitoring weren't set up.
- burnt-resistor 1y ago
  CS/EE here. Malfunction still leads to dragons overall. The problems of sequential logic looping to itself and talking to the outside world under various conditions include (but aren't limited to): getting predictable initialization, predictable durability, matching input impedance, and creating chips with characterizable and reliable setup/hold/delay/etc. times. These days, I leave chip design to chip designers and barely do silly things like create seven (7) total 4 pin to 3 pin Arduino PWM fan controllers with MOSFETs, MOSFET protection and noise reduction circuitry. See, I have to keep the fans fed with over 4 volts so the tach signal continues and the storage array's BMC doesn't freak out. (The fans characteristics I needed aren't/weren't available in 4 pin PWM.) I try not shock myself like ElectroBOOM or release too much magic smoke from gear or vintage gear that might not be replaceable.
mabster 1y ago
Just a big thanks from someone lurking on your blog for a while now. Every article has been fascinating deep insights!

cruffle_duffle 1y ago

“Intel recommends an anti-static mat and a grounding wrist strap when installing a processor to avoid the danger of static electricity, also known as Electrostatic Discharge or ESD.1” You know back when I built my computers, not once did I ever use any kind of static electricity discharge “system”. No wrist strap, no mat, no anything. And I don’t know anybody who did. Has anybody ever actually destroyed a chip with static electricity? (Of course it could be the climate I lived in as well)

the-grump 1y ago
You will fry something if you don't use anti static measures and work on enough boards. Moisture, clothing, habits play a role so it's highly variable.
- LegionMammal978 1y ago
  It's funny, back in an earlier job, I'd keep a board plugged into a programmer, which in turn was plugged into a USB port on my laptop. Whenever I left the restroom, my hands would be slightly wet, and touching the laptop would give me a small shock. Somehow, this shock would reset the board every time, even through the indirect connection. I'm surprised that nothing ever actually got fried in that job. (Except for a company laptop that mysteriously bricked itself after I tried rebooting it.)
  - the-grump 1y ago
    That's actually fine because you were probably going straight to ground. When things are properly grounded and the small components are covered, the current will flow through the thick ground conduit (the laptop body, thick copper on the PCB, eventually into the power cable). What you'd like to avoid is releasing that static charge through a tiny component on the board that couldn't handle the surge.
forgetfreeman 1y ago
Yeah I'm pretty sure I've seen processors and memory both get eaten by ESD. Of course its impossible to prove but techs that didn't use protection had higher RMA rates on components so it gots to a point where the conclusion drew itself.

userbinator 1y ago

But as high-power transistors were developed, SCRs fell out of favor. In particular, once an SCR is turned on, it stays on until power is removed or reversed; this makes SCRs harder to use than transistors. SCRs, also known as thyristors, are still widely used in very high power applications.

adrian_b 1y ago
Thyristors in the strict sense of the word, i.e. SCRs, are still used only in a very small fraction of the applications that were dominated by them a few decades ago. Classic thyristors are useful only for controlling 50/60 Hz AC consumers. Many applications that were done in the past with normal thyristors, for lack of alternatives, like electric motor control, are done now with GTO (gate turn-off) thyristors or with IGBTs (insulated gate bipolar transistors) or with silicon carbide transistors. Even the use of GTO thyristors is regressing. If any thyristors will still be used in the future, they will use silicon carbide, with which they can be much faster than the silicon thyristors.
mrheosuper 1y ago
in AC power network, the power is turn off 100/120 times every second, so using SCR is perfectly fine.

gttalbot 1y ago

Question for @kens -- this circuit you found, how would Intel have designed and tested this?

kens 1y ago
There are various test procedures. For ESD, there are official tests like the Human Body Model, where a capacitor is charged to a specific voltage and discharged into the circuit. Similarly, for latchup, there are official tests that apply specific pulses. Metastability can be tested by applying asynchronous signals, but I'm not sure how that scales when the MTBF is very large. Human Body Model: https://en.wikipedia.org/wiki/Human-body_model https://en.wikipedia.org/wiki/Human-body_model Latchup testing: https://www.ti.com/lit/wp/scaa124/scaa124.pdf?ts=1755513899304 https://www.ti.com/lit/wp/scaa124/scaa124.pdf?ts=17555138993...