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I think FPGAs (or CGRAs really) will make a comeback once LLMs can directly generate FPGA bitstreams.
by checker659 1y ago
I think FPGAs (or CGRAs really) will make a comeback once LLMs can directly generate FPGA bitstreams.
- 15155 1y agoWhat does "directly generate FPGA bitstreams" mean? Placement and routing is an NP-Complete problem.
- duskwuff 1y agoAnd I certainly can't imagine how a language model would be of any use here, in a problem which doesn't involve language.
- 15155 1y agoThey are "okay" at generating RTL, but are likely never going to be able to generate actual bitstreams without some classical implementation flow in there.
- buildbot 1y agoI think in theory, given terabytes of bitstreams, you might be able to get an LLM to output valid designs. Excepting hardened IP blocks, a bitstream is literally a sequence of sram configuration bits to set the routing tables and LUTs. Given the right type of positional encoding I think you could maybe get simple designs working at a small scale.
- CamperBob2 1y agoI'd expect a diffusion model to outperform autoregressive LLMs dramatically.
- buildbot 1y agoCertainly possible! Or perhaps a block diffusion+autoregressive model or something like GPT 4o's image gen.
- checker659 1y agoAI could use EDA tools
- throwawayabcdef 1y agoNo need. I gave ChatGPT this prompt: "Write a data mover in Xilinx HLS with Vitis flow that takes in a stream of bytes, swaps pairs of bytes, then streams the bytes out" And it did a good job. The code it made probably works fine and will run on most Xilinx FPGAs.
- pjc50 1y ago> The code it made probably works fine Solve your silicon verification workflow with this one weird trick: "looks good to me"!
- throwawayabcdef 1y agoIts how I saved cost and schedule on this project.
- ben_w 1y agoI don't even work in hardware, and yet even I have still heard of the Pentium FDIV bug, which happened despite people looking a lot more closely than "probably works fine".
- imtringued 1y agoAMDs FPGAs already come with AI engines.