3 ms·

I didn't know that kind of product existed! I don't think it's useful to slow-sample a fast signal (e.g. they delay digital signals, not analog ones), but some

• amelius 1y ago
  > e.g. they delay digital signals, not analog ones I think they can be used with analog signals too. After all, they are (I suppose) just a chain of transistors holding charge, like in a CCD. It is just the most efficient implementation, since doing it with logic gates will bring more overhead. EDIT: maybe not, it seems at least some of these chips have digital input/output stages. Maybe it could work if you put a very fast 8-bit ADC in front of the delay line, and used 8 delay lines, one for each bit? :) Anyway, I have totally zero experience with these chips. But I can imagine you clock-in the signal using a fast clock (maybe the internal clock), and then you clock-out the signal using a slow clock (slow enough for a subsequent ADC chip). Also, perhaps you can put a bunch of these combinations in parallel to increase bandwidth, or to increase sample depth.