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WHY ARE VERSAL BOARDS SO EXPENSIVE (i had to rant somewhere) I’m waiting for the similar cost reduction that happened to Ultrascale+ devices and we finally got
by CheeksTheGeek 1y ago
WHY ARE VERSAL BOARDS SO EXPENSIVE (i had to rant somewhere)
I’m waiting for the similar cost reduction that happened to Ultrascale+ devices and we finally got something like the ZuBoard
- fargle 1y agoVersal "edge" VE2302 boards are coming from multiple vendors. much better pricing. i'm guessing they will be available in a month or so - they are supposed to "Q2" but seem to be a little bit late (as is typical).
- fecal_henge 1y agoAre the boards significantly more expensive than the devices?
- transpute 1y agoNeed something like this $160 Zuboard entry to 5-figure Zynq market, https://news.avnet.com/press-releases/press-release-details/2022/Avnet-Launches-ZUBoard-Development-Kit-based-on-the-Newest--AMD-Xilinx-Zynq-UltraScale-MPSoC-Device/default.aspx https://news.avnet.com/press-releases/press-release-details/... > the smallest, lowest power, and most cost-optimized member of the Zynq UltraScale+ family.. jump-start.. MPSoC-based end systems like miniaturized, compute-intensive edge applications in industrial and healthcare IoT systems, embedded vision cameras, AV-over-IP 4K and 8K-ready streaming, hand-held test equipment, consumer, medical applications and more.. board is ideal for design engineers, software engineers, system architects, hobbyists, makers and even students
- echelon 1y agoCan someone with more knowledge of AMD explain if these are useful for real AI work? Without CUDA does it feel like working in the dark ages?
- KeplerBoy 1y agoThey are useful for AI, but it's a completely different beast than a GPU.
- _sbrk 1y agoF = Field P = Programmable G = Gate <---- important A = Array You aren't "programming", you're "wiring gates together". In other words, you can build custom hardware to solve a problem without using a generic CPU (or GPU) to do it. FPGAs are implemented as a fabric of LUTs (Look-up Tables) which take 4- or 6- (or more) inputs and produce an output. That allows Boolean algebra functions to be processed. The tools you use (Vivado / ISE / YoSys / etc.) take a your intended design, written in a HDL (Hardware Design Language) such as Verilog or VHDL, and turn it into a configuration file which is injected into the FPGA, causing it to be configured to into the hardware you want (if you've done it right). FPGAs are a stepping stone between generic hardware such as a CPU or GPU and a custom ASIC. They win when you can express the problem in specialized hardware much better than writing code to do something on a CPU/GPU. Parallelization is the key to many FPGA designs. Also, you don't have to spend >$1MM on a mask set to go have an ASIC fabricated by TSMC, etc.
- echelon 1y agoAh, I wasn't aware AMD had a line of FPGAs. Given the density of the PDF, I saw AMD and AI in the title and assumed the scientific community was trying to get AMD GPUs to work. This makes more sense.
- transpute 1y ago> line of FPGAs Via Xilinx $49B acquisition, https://www.crn.com/news/components-peripherals/amd-completes-49b-xilinx-acquisition-largest-chip-deal-in-history https://www.crn.com/news/components-peripherals/amd-complete...
- OneDeuxTriSeiGo 1y agoIt depends where you get them from. A lot of the dev boards have extra tooling and of course a healthy chunk of "dev tax" unfortunately. Luckily you can find much more barebones boards available if you know where to look. https://www.en.alinx.com/Product/SoC-Development-Boards/Versal-AI-Edge/VD100.html https://www.en.alinx.com/Product/SoC-Development-Boards/Vers...
- _sbrk 1y agoIt's not just that the boards are expensive; you'll also need a Vivado license to create any designs for it. That license is at least several thousand dollars for the Versal devices.
- transpute 1y agoIt's taken many years of reverse engineering, but there's now an efficient OSS toolchain for the smaller Artix7 FPGA family, https://antmicro.com/blog/2020/05/multicore-vex-in-litex/ https://antmicro.com/blog/2020/05/multicore-vex-in-litex/
- tux3 1y agoThis blog doesn't seem to talk about the OSS toolchain, litex/vexriscv are very neat but they don't replace Vivado, right?
- transpute 1y agoLike all open-source, it's an ongoing effort. Bunnie has a comparison, https://www.bunniestudios.com/blog/2017/litex-vs-vivado-first-impressions/ https://www.bunniestudios.com/blog/2017/litex-vs-vivado-firs... > Thanks to the extensive work of the MiSoC and LiteX crowd, there’s already IP cores for DRAM, PCI express, ethernet, video, a softcore CPU (your choice of or1k or lm32) and more.. LiteX produces a design that uses about 20% of an XC7A50 FPGA with a runtime of about 10 minutes, whereas Vivado produces a design that consumes 85% of the same FPGA with a runtime of about 30-45 minutes.. LiteX, in its current state, is probably best suited for people trained to write software who want to design hardware, rather than for people classically trained in circuit design who want a tool upgrade.