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The real reason to use those languages is because they often lend themselves to using the meta-language for other purposes, like writing flexible open ended tes
by aseipp 2y ago
The real reason to use those languages is because they often lend themselves to using the meta-language for other purposes, like writing flexible open ended test suites, or using some forms of code generation/metaprogramming to generate parts of the design from other things. That's very useful and one of the attractive properties of systems like Amaranth or Clash, and one of the downsides (IMO) of approaches like Filament or Bluespec. That said, the most important bits about Filament and Bluespec are their high-level concepts (like guarded actions and timeline types), which could be adopted into other RTLs as well.
At the end of the day though, sometimes you just have to debug a netlist, and that probably will remain true of Filament too. (Any language with higher-order applicative concepts will eventually run into some issues with wire names, etc, that's just unavoidable.) I think the SystemVerilog or whatever is just a red herring at that point; the tools for doing netlist debugging all feel like the equivalent of having to debug compiler assembly output with no debug symbols. Making sure you need to reach for the debugger much less is a good first step, but I'm not sure how to improve this part.
- IshKebab 2y agoYeah I agree that debugging generated SV is like debugging assembly and you rarely have to do that when writing normal programs. I think the difference is tooling. I can fire up an IDE debugger and have full access to all the relevant information and controls without seeing any assembly. I don't know of any compile-to-SV tools that have a debugger anywhere near as capable as that. They definitely should! But they don't right now, so we're stuck at debugging RTL.