3 ms·

It really isn't. Biggest issue is that register width is half of pointer width, so for arbitrary pointers you at least need to make a trip through the zero pag

It really isn't. Biggest issue is that register width is half of pointer width, so for arbitrary pointers you at least need to make a trip through the zero page. That fact alone really obfuscates a lot of what you're trying to teach as a first stab in assembly. I say this as someone who has a whole lesson plan in 6502 asm.

djmips 2y ago
IDK - I guess you are mentally modelling it wrong. Think of the zero page as a bunch of registers - that's kind of how I modelled it and it was also the hump to get over that helped someone building a 6502 compiler backend. See the slide on imaginary registers. https://llvm.org/devmtg/2022-05/slides/2022EuroLLVM-LLVM-MOS-6502Backend.pdf https://llvm.org/devmtg/2022-05/slides/2022EuroLLVM-LLVM-MOS... But all that being said, 68000 or modern ARM or RISCV are also good targets. I am probably just a little nostalgic for the 6502.
- renewedrebecca 2y ago
  It's really not a bunch of registers though... If you could so something like LD[$0f] #65 - then yeah, you have registers. But you can't do that sort of thing with zero page. You'd still need to do: LDA #65 STA $0f
  - djmips 2y ago
    You can do LDA ($0f),y This is using a 16 byte address in zp as a ptr + y offset For LD[$0f] #65 It's more instructions but you LDA #65 STA ($0f),Y (assume Y = 0)
    - renewedrebecca 2y ago
      Sure, but the point is that you can't treat a zero page address like a register. There's a LDA, LDX, LDY, but no way to load directly to a zero page address. You have to load a real register, then store it in the ZP address. Zero page isn't a bunch of registers because register operations by and large don't work on them directly.
      - djmips 2y ago
        I'm not trying to convince you that zero page are hardware registers just that they can be thought of as register-like. If you were coding on a 68000 you might do some memory operation indirect via an address register like (a0)++ but on 6502 you do it via a zp pointer with the ++ handled by incrementing Y. You can have many of these pointers. They fufill what you might use registers for on another CPU. So no, they are not registers but they are register-like in the way that can be used as pointers, holding constants, temporaries and have the advantage of a cycle faster than regular memory access. I notice that some people who programmed the Z80 struggle with this way of looking at the 6502 which can be as efficient as the Z80 if coded properly. From you POV this is probably a specious argument since there is a very definitive view of what a register is in a CPU and that because of the Church-Turing a 6502 can pretend to be anything including a 68000 or RISC-V - but all I will say is that it's still a worthwhile abstraction to hold when you're designing code for the 6502. Going off track, a further abstraction that I find amusing is to consider the zero page a register file and 6502 assembly microcode. For sure you could then come up with your own ISA for the 6502 that would be nicer to program and more directly amenable to compilers. Steve Wozniak's Sweet16 was fun virtual 16 bit CPU that ran on the 6502.

djmips 2y ago

IDK - I guess you are mentally modelling it wrong. Think of the zero page as a bunch of registers - that's kind of how I modelled it and it was also the hump to get over that helped someone building a 6502 compiler backend. See the slide on imaginary registers. https://llvm.org/devmtg/2022-05/slides/2022EuroLLVM-LLVM-MOS-6502Backend.pdf https://llvm.org/devmtg/2022-05/slides/2022EuroLLVM-LLVM-MOS... But all that being said, 68000 or modern ARM or RISCV are also good targets. I am probably just a little nostalgic for the 6502.

renewedrebecca 2y ago
It's really not a bunch of registers though... If you could so something like LD[$0f] #65 - then yeah, you have registers. But you can't do that sort of thing with zero page. You'd still need to do: LDA #65 STA $0f
- djmips 2y ago
  You can do LDA ($0f),y This is using a 16 byte address in zp as a ptr + y offset For LD[$0f] #65 It's more instructions but you LDA #65 STA ($0f),Y (assume Y = 0)
  - renewedrebecca 2y ago
    Sure, but the point is that you can't treat a zero page address like a register. There's a LDA, LDX, LDY, but no way to load directly to a zero page address. You have to load a real register, then store it in the ZP address. Zero page isn't a bunch of registers because register operations by and large don't work on them directly.
    - djmips 2y ago
      I'm not trying to convince you that zero page are hardware registers just that they can be thought of as register-like. If you were coding on a 68000 you might do some memory operation indirect via an address register like (a0)++ but on 6502 you do it via a zp pointer with the ++ handled by incrementing Y. You can have many of these pointers. They fufill what you might use registers for on another CPU. So no, they are not registers but they are register-like in the way that can be used as pointers, holding constants, temporaries and have the advantage of a cycle faster than regular memory access. I notice that some people who programmed the Z80 struggle with this way of looking at the 6502 which can be as efficient as the Z80 if coded properly. From you POV this is probably a specious argument since there is a very definitive view of what a register is in a CPU and that because of the Church-Turing a 6502 can pretend to be anything including a 68000 or RISC-V - but all I will say is that it's still a worthwhile abstraction to hold when you're designing code for the 6502. Going off track, a further abstraction that I find amusing is to consider the zero page a register file and 6502 assembly microcode. For sure you could then come up with your own ISA for the 6502 that would be nicer to program and more directly amenable to compilers. Steve Wozniak's Sweet16 was fun virtual 16 bit CPU that ran on the 6502.