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Python Logic Simulation Library
- gsmecher 2y agoThese experiments are always unique, and each is interesting in its own way. Can you comment on the use of asynchronous code rather than generators? For example, here's a throw-away example of a clock using generators and a syntax that's otherwise similar to yours: from more_itertools import take def drv_clock(): while True: yield "1b1" yield "1b0" for x in take(10, drv_clock()): print(x) I have written signal flow graphs (including feedback) using a generator-style approach, intended to prototype datapaths that are then manually translated into RTL. It's different, but not completely different.
- woadwarrior01 2y ago> Can you comment on the use of asynchronous code rather than generators? I'm not the OP. IIUC, async functions are implemented using generators under the hood. cf: The asyncio.coroutine decorator from Python 3.4, before async await syntax was implemented in Python 3.5 (PEP 492).
- cjdrake 2y agoCorrect in this case. In src/seqlogic/sim.py there are four usages of 'yield' keyword that suspend the current coroutine and return control to the event loop.
- cjdrake 2y agoAs mentioned in another answer, deep down there's not much difference. Personally, I find async/await more elegant for concurrent algorithm design (e.g. https://github.com/cjdrake/seqlogic/blob/main/ipynb/dining_philosophers.ipynb https://github.com/cjdrake/seqlogic/blob/main/ipynb/dining_p...). But control threads like a clock/reset aren't the main idea. Look at the example RISC V core for the design style we're attempting (https://github.com/cjdrake/seqlogic/tree/main/tests/riscv/core https://github.com/cjdrake/seqlogic/tree/main/tests/riscv/co...). No async/await or yields anywhere. It's described in a structural way, and a couple layers of Python hide the details.
- avnd 2y agoPretty cool! Have you heard of PyRTL? https://ucsbarchlab.github.io/PyRTL/ https://ucsbarchlab.github.io/PyRTL/
- cjdrake 2y agoNice documentation :).