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AMD's Turin: 5th Gen EPYC Launched
- bitwize 2y ago> Apparently we now think 64 cores is ‘lower core count’. What a world we live in. 64 cores is a high-end gaming rig. Civilization VII won't run smoothly on less than 16.
- noncoml 2y agoCivilization VII won't run smoothly. Only recently I managed to build a PC that will run Civ 6 smoothly during late game on huge map
- 7thpower 2y agoWhat are the specs? Tangentially related, but I need to go check a18 civ 6benchmarks. The experience on my a15 with small map sizes was surprisingly good.
- zamadatix 2y agoCiv 6 really doesn't utilize cores as much as one would think. I mean it'll spread the load across a lot of threads, sure, but it never seems to actually... use them much? E.g. I just ran the Gathering Storm expansion AI benchmark (late game map completely full of civs and units - basically worst case for CPU requirements and best case for eating up the multicore performance) on a 7950X 16 core CPU and it rarely peaked over 30% utilization, often averaging ~25%. 30% utilization means a 6 core part (barring frequency/cache differences) should be able to eat that at 80% load. https://i.imgur.com/YlJFu4s.png https://i.imgur.com/YlJFu4s.png Whether the bottleneck is memory bandwidth (2x6000 MHz), unoptimized locking, small batch sizes, or something else it doesn't seem to be related to core count. It's also not waiting on the GPU much here, the 4090 is seeing even less utilization than the CPU. Hopefully utilization actually scales better with 7, not just splits up a lot.
- lukeschlather 2y ago> 16 core CPU and it rarely peaked over 30% utilization, often averaging ~25%. 30% utilization means a 6 core part (barring frequency/cache differences) should be able to eat that at 80% load. As a rule I wouldn't be surprised if 90% of the stuff Civ 6 is doing can't be parallelized at all, but then for that remaining 10% you get a 16x speedup with 16 cores. And they're underutilized on average but there are bursts where you get a measurable speedup from having 16 cores, and that speedup is strictly linear with the number of cores. 6 cores means that remaining 10% will be less than half as fast vs. having 16 cores. And this is consistent with observing 30% CPU usage I think.
- colechristensen 2y agoMy rule is more like I’d be willing to bet even odds that this could be sped up 100x with the right programmers focused on performance. When you lack expertise and things work “well enough” that’s what you get. Same for games or enterprise software.
- squarefoot 2y agoThat's what we get in a market dominated more by the need to release before the competition rather than taking some time to optimize software. If it's slow, one can still blame the iron and users who don't upgrade it.
- oivey 2y agoIf only 10% of the workload can be parallelized, then the best case parallelization speed up is only 10%. That doesn’t line up with the GP’s claim that Civ6 benefits from more cores.
- Uvix 2y agoThey referenced the upcoming Civ7 (which does include 16-core chips on their highest recommended specs), not Civ6.
- gkhartman 2y agoI can't help but think that this sounds more like a failure to optimize at the software level rather than a reasonable hardware limitation.
- cubefox 2y agoThat's the usual case when vid3o g4mes are "CPU limited". One has to just look whether the game does anything high-level that other games didn't do 10 years ago. Reasonable hardware limitations related to the CPU have normally to do with complex physics effects or unusually large crowds of NPCs. (Many games are CPU limited even for fairly small crowds because their engine isn't optimized for that purpose.)
- deaddodo 2y ago> vid3o g4mes Why do you type it like that?
- immibis 2y agoUsually people do this to avoid automatic censorship systems. HN certainly has censorship in place, but I'm not aware of any that targets discussion of video games.
- cubefox 2y agoOld habit. I'm a kid of the 1990s, and we were convinced there wasn't anything cooler than a) video games and b) replacing letters with numbers. It retrospect, we might have been a little biased.
- deaddodo 2y agoWell, just for future reference; if you're a kid of the 90s, you're well into your 30s now. It's weird/juvenile to be typing a phrase in a manner similar to a preteen, well after 20+ years have passed. Especially in the middle of an otherwise normal message/conversation.
- treesciencebot 2y agoall high end "gaming" rigs are either using ~16 real cores or 8:24 performance/efficiency cores these days. threadripper/other HEDT options are not particularly good at gaming due to (relatively) lower clock speed / inter-CCD latencies.
- csomar 2y agoIf Civ 6 is any guidance, 64 or 32 won't make a slight difference. The next step calculations seem to run on a single CPU and thus having more CPUs is not going to change a thing. This is a software problem; they need to distribute the calculation over several CPUs.
- fulafel 2y agoAs the GPGPU scene trajectory seems dismal[1] for the foreseeable future wrt the DX, this seems like the best hope. [1] Fragmentation, at best C++ dialects, no practical compiler tech to transparently GPU offload, etc
- snvzz 2y agociv6's slowness is purely bad programming. No excuses to be had.
- Pet_Ant 2y ago[citation needed]
- dragontamer 2y agoChipsAndCheese is one of the few new tech publications that really knows what they are talking about, especially with these deep dive benchmarks. With the loss of Anandtech, TechReport, HardCOP and other old technical sites, I'm glad to see a new publisher who can keep up with the older style stuff.
- mongol 2y agoInterestingly, Slashdot originated from a site called "Chips & Dips". Similiar inspiration?
- tandr 2y agoDid you mean to say HardOCP?
- deleted 2y ago[deleted]
- kderbe 2y agoChips and Cheese most reminds me of the long gone LostCircuts. Most tech sites focus on the slate of application benchmarks, but C&C writes, and LC wrote, long form articles about architecture, combined with subsystem micro-benchmarks.
- jeffbee 2y agoThe part with only 16 cores but 512MB L3 cache ... that must be for some specific workload.
- addaon 2y agoDoes anyone know if modern AMD chips allow mapping the L3 cache and using it as TCM instead of cache? I know older non-X86 processors supported this (and often booted into that mode so that the memory controllers could be brought up), but not sure if it's possible today. If so, that would sure make for some interesting embedded use cases for a large DRAM-less system...
- bpye 2y agoThe coreboot docs claim that modern AMD parts no longer support cache-as-RAM. https://doc.coreboot.org/soc/amd/family17h.html https://doc.coreboot.org/soc/amd/family17h.html
- SV_BubbleTime 2y agoLame. Using it as TCM ram seems super useful. Although you would need to fight/request it from the OS, so technically I see why they might ditch it.
- hales 2y agoWow, thanks for the link, I had no idea: > AMD has ported early AGESA features to the PSP, which now discovers, enables and trains DRAM. Unlike any other x86 device in coreboot, a Picasso system has DRAM online prior to the first instruction fetch. Perhaps they saw badly trained RAM as a security flaw? Or maybe doing it with the coprocessor helped them distribute the training code more easily (I heard a rumour once that RAM training algos are heavily patented? Might have imagined it).
- londons_explore 2y agoIf you keep your working set small enough, you should be able to tell the CPU it has RAM attached, but never actually attach any RAM. It would never flush any cache lines to RAM, and never do any reads from RAM.
- mistyvales 2y agoHere I am running a 12 year old Dell PowerEdge with dual Xeons.. I wonder when the first gen Epyc servers will be cheap fodder on eBay.
- assusdan 2y agoIMO, 1st gen Epyc is not any good, given that 2nd gen exists, is more popular and is cheap enough (I actually have epyc 7302 and MZ31-AR0 motherboard as homelab). Too low performance per core and NUMA things, plus worse node (2nd gen compute is 7nm TSMC)
- renewiltord 2y agoNot worth. Get 9654 on eBay for $2k plus $1k for mobo. $7k full system. Or go Epyc 7282 type, and that’s good combo easily available.
- ipsum2 2y agoThey already are, and aren't very good.
- p1necone 2y ago1-3rd gen Epycs can be had super cheap, but the motherboards are expensive. Also not worth getting anything less than 3rd gen unless you're primarily buying them for the pcie lanes and ram capacity - a regular current gen consumer CPU with half - a quarter of the core count will outperform them in compute while consuming significantly less power.
- justmarc 2y agoLots of great second hand hardware to be had on ebay. Even last gen used CPUs, as well as RAM, at much less than retail. However when you end up building a server quite often the motherboard + case is the cheap stuff, the CPUs are second in cost and the biggest expense can be the RAM.
- jsheard 2y agoWhen buying used Epycs you have to contend with them possibly being vendor-locked to a specific brand of motherboard as well. https://www.servethehome.com/amd-psb-vendor-locks-epyc-cpus-for-enhanced-security-at-a-cost/ https://www.servethehome.com/amd-psb-vendor-locks-epyc-cpus-...
- elric 2y agoAt 1:11 in the video, there's a chart of the TDP (which I looked for in the text but couldn't find). At 125-500W, these things run very hot.
- bunabhucan 2y agohttps://www.servethehome.com/wp-content/uploads/2024/10/AMD-EPYC-9005-SKU-Stack-2024-10.jpg https://www.servethehome.com/wp-content/uploads/2024/10/AMD-... Has the full range with TDP. 500w is only for the 128/192 monster chips. The 16 core fast sku has a 320W TDP.
- Sakos 2y agoThe 7950x3D is rated at 120w TDP. 320w seems quite high.
- adgjlsfhk1 2y agothat's the processor you're supposed to buy only if you are paying $10000 per core per year for some ridiculously expensive enterprise software. the extra power comes from all the extra memory channels and cache
- icegreentea2 2y agoIt is high, but it probably can sustain much higher all core frequency compared to 7950x3D (or 7950x). If nothing else, it has a bigger die and heat spreading to pull heat from, it should be easier to maintain thermal headroom on the EYPC chip. That being said, it looks most probable what a 9175F is just a 9755 (their absolute max full size Zen5 core part) with nearly all (7/8) of their cores per CCD disabled in order to get all 512MB of cache. This means that there's a lot of extra interconnect being kept running per core which certainly would contribute to the higher TDP. Of course, in principle this should also mean that each core (which should basically have all of a CDD's IO and cache available to it) should be screaming fast in real terms. Of course finally, TDP is a totally fluffy number. The TDP of the 7950X3D is most probably as low as it is because of how much internal thermal resistance (the extra V-Cache layer) it has. Part of it's lower TDP isn't because "it's efficient", part of it is because "if we run it hotter, we'll melt it". The TDP for the 7950X for example is 170W.
- stonethrowaway 2y ago[flagged]
- usefulcat 2y agoI think you’re seeing downvotes because your criticism seems painfully uninformed and uninteresting to boot.
- deleted 2y ago[deleted]
- wmf 2y agoNaples, Rome, Milan, Genoa, and Turin are just cities in Italy; I'm not sure what's childish about that. They have to use something for codenames.
- diffeomorphism 2y agoThe criticism is about "EPYC" not about the codenames. That brand name has been used since 2017 but if you don't know that, it sounds quite gamery nowadays. Admittedly I also have no idea why Intel calls theirs Xeon, which sounds like misspelled xenon. But then it might be a proper Greek word?
- justincormack 2y agoTrademarks are easier if they are not words (no prior use or conflicts), but having them be like words is easier so people can say them.
- Dylan16807 2y ago> The criticism is about "EPYC" not about the codenames. The criticism above says "Turin, Epyc and lord knows what else". That clearly includes the codenames.
- fecal_henge 2y agoWhats wrong with an arbitary 16 digit number?
- bob1029 2y agoI'd like to see the 9965 in action. These parts are crazy. Will definitely be looking to buy a machine from this generation. https://www.amd.com/en/products/processors/server/epyc/9005-series.html https://www.amd.com/en/products/processors/server/epyc/9005-...
- Salgat 2y agoI wonder how this compares to the 7950x3d. So much cache and a high boost clock. https://www.amd.com/en/products/processors/server/epyc/9005-series/amd-epyc-9175f.html https://www.amd.com/en/products/processors/server/epyc/9005-...
- Tuna-Fish 2y agoGreat if you have 16 independent workloads, terrible for things that care about communication between threads. It has 16 CCD, each with only one thread enabled, latency between CCD is ~150ns.
- justmarc 2y agoSurprise surprise, not every tool is right for every job.
- menaerus 2y agoNot sure if this comment was about to come out as snarky but the parent rightfully pointed out the not so obvious design of EPYC CPUs. CCD is a NUMA in disguise.
- tryauuum 2y agoNot in disguise, there's a setting in BIOS, if you set NPS4 + L3 cache as NUMA domain then each CCD will be visible from OS as a separate NUMA node
- smolder 2y ago
- justmarc 2y agoTruly mind boggling scale. Twenty years ago we had just 1-2 cores per CPU, so we were lucky to have 4 cores in a dual socket server. A single server can now have almost 400 cores. Yes, we can have even more ARM cores but they don't perform as well as these do, at least for now.
- zer00eyz 2y ago700+ threads over 2 cores, can saturate 2 400gbe Nic's 500 wats per chip (less than 2 wats per thread)... All of that in a 2U package.... 20 years ago that would have been racks of gear.
- smolder 2y ago> 700+ threads over 2 cores I assume you mean 2 sockets.
- jmrm 2y agoI think those really 2 watts per thread are a lot more important than what us home users usually think. Having to deliver less power and having to dissipate less watts in form of heat in a data centre are really good news to its operative costs, which is usually a lot bigger than the cost of the purchase of the servers
- justmarc 2y agoWith these CPUs one can definitely hit much higher rates. 800Gbps from a single server was achieved by Netflix on much lesser systems two years ago: https://nabstreamingsummit.com/wp-content/uploads/2022/05/2022-Streaming-Summit-Netflix.pdf https://nabstreamingsummit.com/wp-content/uploads/2022/05/20... If I were to guess, this hardware can do double that, also helping that we now have actual 800Gbps Ethernet hardware. Indeed 20 years ago this would have been racks of gear at a very high cost and a huge power bill.
- immibis 2y agoThat's one hell of a pixelflut server.
- speedgoose 2y agoI'm looking forward to deploy AMD Turin bare metal servers on Hetzner. The previous generations already had a great value but this seems a step above.
- nickpp 2y agoJust in time for Factorio 2.0.
- smolder 2y agoThe weirdest one of the bunch is the AMD EPYC 9175F: 16 cores with 512MB of L3 cache! Presumably this is for customers trying to minimize software costs that are based on "per-core" licensing. It really doesn't make much sense to have so few cores at such an expense, otherwise. Does Oracle still use this style of licensing? If so, they need to knock it off. The only other thing I can think of is some purpose like HFT may need to fit a whole algorithm in L3 for absolute minimum latency, and maybe they want only the best core in each chiplet? It's probably about software licenses, though.
- aecmadden 2y agoThis optimises for a key vmware license mechanism "Per core licensing with a minimum of 16 cores licensed per CPU.".
- puzzlingcaptcha 2y agoWindows server licensing starts at 16 cores
- londons_explore 2y agoPlenty of applications are single threaded and it's cheaper to spend thousands on a super fast CPU to run it as fast as possible than spend tens of thousands on a programmer to rewrite the code to be more parallel. And like you say, plenty of times it is infeasible to rewrite the code because its third party code for which you don't have the source or the rights.
- RHab 2y agoAbaqus for example is by core, I am severly limited, for me this makes totally sense.
- bob1029 2y agoAnother good example is any kind of discrete event simulation. Things like spiking neural networks are inherently single threaded if you are simulating them accurately (I.e., serialized through the pending spike queue). Being able to keep all the state in local cache and picking the fastest core to do the job is the best possible arrangement. The ability to run 16 in parallel simply reduces the search space by the same factor. Worrying about inter CCD latency isn't a thing for these kinds of problems. The amount of bandwidth between cores is minimal, even if we were doing something like a genetic algorithm with periodic crossover between physical cores.
- bytepursuits 2y agoWhen is 8005 coming?
- thelastparadise 2y agoI wonder how LLM performance is on the higher core counts? With recent DDR generations and many core CPUs, perhaps CPUs will give GPUs a run for their money.
- kolbe 2y agoThe H100 has 16,000 cuda cores at 1.2ghz. My rough calculation is it can handle 230k concurrent calculations. Whereas a 192 core avx512 chip (assuming it calculates on 16 bit data) can handle 6k concurrent calculations at 4x the frequency. So, about a 10x difference just on compute, not to mention that memory is an even stronger advantage for GPUs.
- unnah 2y agoA Zen 5 core has four parallel AVX-512 execution units, so it should be able to execute 128 16-bit operations in parallel, or over 24k on 192 cores. However I think the 192-core processors use the compact variant core Zen 5c, and I'm not sure if Zen 5c is quite as capable as the full Zen 5 core.
- menaerus 2y agoRight, I found this interesting as a thought exercise and took it from another angle. Since it takes 4 cycles to execute FMA on double-precision 64-bit floats (VFMADD132PD) this translates to 1.25G ops/s (GFLOPS/s) per each core@5GHz. At 192 cores this is 240 GFLOPS/s. For a single FMA unit. At 2x FMA units per core this becomes 480 GFLOPS/s. For 16-bit operations this becomes 1920 GFLOPS/s or 1.92 TFLOPS/s for FMA workloads. Similarly, 16-bit FADD workloads are able to sustain more at 2550 GFLOPS/s or 2.55 TFLOPS/s since the FADD is a bit cheaper (3 cycles). This means that for combined half-precision FADD+FMA workloads zen5 at 192 cores should be able to sustain ~4.5 TFLOPS/s. Nvidia H100 OTOH per wikipedia entries, if correct, can sustain 50-65 TFLOP/s at single-precision and 750-1000 TFLOPS/s at half-precision. Quite a difference.
- Remnant44 2y ago
- TacticalCoder 2y ago> The system we had access to was running 6000MT/s for its memory, and DDR5-6000 MT/s is what most systems will support in a 1 DIMM per channel configuration. Should you want to run 2 DIMMs per channel, then your memory speeds drop to 4400 MT/s; and if you run 1 DIMM per channel in a motherboard with 2 DIMMs per channel then expect 5200 MT/s for your memory speed. Is this all ECC memory at these speeds?
- wmf 2y agoYes, servers only use ECC RAM.
- aurareturn 2y agoPhoronix recently reviewed the 196 core Turin Dense against the AmpereOne 192 core. * Ampere MSRP $5.5K vs $15K for the EPYC. * Turin 196 had 1.6x better performance * Ampere had 1.2x better energy consumption In terms of actual $/perf, Ampere 192 core is 1.7x better than Turin Dense 196 core based on Phoronix's review. So for $5.5k, you can either buy an AmpereOne 192 core CPU (274w) or a Turin Dense 48 core CPU (300w). Ampere has a 256 core, 3nm, 12 memory channel shipping next year that is likely to better challenge Turin Dense and Sierra Forest in terms of raw performance. For now, their value proposition is $/perf. Anyway, I'm very interested in how Qualcomm's Nuvia-based server chips will perform. Also, if ARM's client core improvements are any indication, I will be very interested in how in-house chips like AWS Graviton, Google Axion, Microsoft Cobalt, Nvidia Grace, Alibaba Yitian will compete with better Neoverse cores. Nuvia vs ARM vs AmpereOne. This is probably the golden age of server CPUs. 7 years ago, it was only Intel's Xeon. Now you have numerous options.
- ksec 2y agoAmpere's MSRP is pretty close to most system vendor is paying. You could expect most vendor buy EPYC or Xeon at close to 50% off MSRP.
- KingOfCoders 2y agoThe difference is, you can get EPYC CPUs but you can't get hold of Ampere CPUs.
- tpurves 2y agoAMD also wins on perf/Watt which is pretty notable for anyone who still believed that X86 could never challenge ARM/Risc in efficiency. These days, lot of data centers are also more limited by available Watts (and associated cooling) which bodes well for Turin.
- AnthonyMouse 2y ago> In terms of actual $/perf, Ampere 192 core is 1.7x better than Turin Dense 196 core based on Phoronix's review. You're comparing it to the highest MSRP Turin, which doesn't have the highest performance/$. People buy that one if they want to maximize density or performance/watt, where it bests Ampere. If you only care about performance/$ you would look at the lower core count Zen5 (rather than Zen5c) models which have twice the performance/$ of the 192-core 9965. Doing the same for Ampere doesn't work because their 192-core 3.2GHz model is very nearly already their peak performance/$.
- stzsch 2y agoFor those that dislike their change to substack, there is https://old.chipsandcheese.com/2024/10/11/amds-turin-5th-gen-epyc-launched/ https://old.chipsandcheese.com/2024/10/11/amds-turin-5th-gen.... At least for now.