I'm curious if it is possible to design an AI accelerator built around ROM that is programmable via maskless lithography. The idea being that 90% of the chip is

I'm curious if it is possible to design an AI accelerator built around ROM that is programmable via maskless lithography. The idea being that 90% of the chip is being produced using conventional mask based semiconductor technology, but the data is written through electron beam lithography. Given a regular ROM structure on the silicon wafer, it would be possible to take advantage of parallel beams and design an electron beam lithography machine specifically for ROM to reduce the cost of programming. The final frontier would be to build a "wafer scale engine"-esque single wafer chip and we would have essentially reached the limits of what is achievable through clever design of silicon based semiconductors.