8 ms·

https://en.wikipedia.org/wiki/Multi-level_cell https://en.wikipedia.org/wiki/Multi-level_cell

• breck 2y ago
  Very interesting. I would have thought the overhead from the memory controller would negate all savings, but I know very little about modern cell design.
  • marcosdumay 2y ago
    > overhead from the memory controller If you want to do it in a single step, you need 8 analogic comparators at the output of the memory, and one level of "and" and "or" gates to solve each bit. Most ADCs use a single comparator + OpAmp and convert the value in 3 steps. But that would make your memory slower. Either way, the task of converting it does not fall over the controller.