16 ms·
Transforming a QLC SSD into an SLC SSD
- mofosyne 2y agoIt be nice if manufacturers provide a way to downgrade SSD to SLC via some driver settings.
- NL807 2y agobut how would they make more money?
- Lex-2008 2y agoI'd buy such a device. Currently in holding on to my last pair of SSDs from pre-QLC era, refusing to buy anything new
- LoganDark 2y agoThere are still new SSDs that use TLC, such as the Silicon Power UD90 (I have one in my system). Not only that, some of them will run in SLC mode when writing new data and then move the data to TLC later - advertised as SLC Caching - which could be even better than always-TLC drives (even ones with a DRAM cache).
- drtgh 2y agoYour comment, along with other users, suggests that TLC is a positive attribute for consumers, however, the transition from SLC and MLC NAND to TLC and QLC 3D-NAND actually marked a decline in the longevity of SSDs. Using a mode other than SLC with current SSDs is insane due to the difference with planar NAND features, as the current 3D-NAND consumes writes for everything. 3D-NAND, To read data consume writes [0], " Figure 1a plots the average SSD lifetime consumed by the read-only workloads across 200 days on three SSDs (the detailed parameters of these SSDs can be found from SSD-A/-B/-C in Table 1). As shown in the figure, the lifetime consumed by the read (disturbance) induced writes increases significantly as the SSD density increases. In addition, increasing the read throughput (from 17MBps to 56/68MBps) can greatly accelerate the lifetime consumption. Even more problematically, as the density increases, the SSD lifetime (plotted in Figure 1b) decreases. In addition, SSD-aware write-reduction-oriented system software is no longer sufficient for high-density 3D SSDs, to reduce lifetime consumption. This is because the SSDs entered an era where one can wear out an SSD by simply reading it." 3D-NAND, Data retention consume writes [1], " 3D NAND flash memory exhibits three new error sources that were not previously observed in planar NAND flash memory: (1) layer-to-layer process variation, a new phenomenon specific to the 3D nature of the device, where the average error rate of each 3D-stacked layer in a chip is significantly different; (2) early retention loss, a new phenomenon where the number of errors due to charge leakage increases quickly within several hours after programming; and (3) retention interference, a new phenomenon where the rate at which charge leaks from a flash cell is dependent on the data value stored in the neighboring cell. " [0] https://dl.acm.org/doi/10.1145/3445814.3446733 https://dl.acm.org/doi/10.1145/3445814.3446733 [1] https://ghose.cs.illinois.edu/papers/18sigmetrics_3dflash.pdf https://ghose.cs.illinois.edu/papers/18sigmetrics_3dflash.pd...
- jsheard 2y agoEven datacenter-grade drives scarcely use SLC or MLC anymore since TLC has matured to the point of being more than good enough even in most server workloads, what possible need would 99% of consumers have for SLC/MLC nowadays? If you really want a modern SLC drive there's the Kioxia FL6, which has a whopping 350,400 TB of write endurance in the 3TB variant, but it'll cost you $4320. Alternatively you can get 4TB of TLC for $300 and take your chances with "only" 2400 TB endurance.
- drtgh 2y agoTLC cannot mature as long as it continues to use 3D-NAND without utilizing a more advanced material science. Reading data and preserving data consume writes, what degrades the memory, because the traces in the vertical stack of the circuit create interference. Perhaps there are techniques available to separate the traces, but this would ultimately increase the surface area? which seems to be something they are trying to avoid. You should not use datacenter SSD disks as a reference, as they typically do not last more than two years and a half. It appears to be a profitable opportunity for the SSD manufacturer, and increasing longevity does not seem to be a priority. To be more specific, we are talking about planned obsolescence for consumer and enterprise SSD disks. > If you really want a modern SLC drive there's the Kioxia FL6, which has a whopping 350,400 TB of write endurance in the 3TB variant, but it'll cost you $4320. Did you read the OP article?
- LoganDark 2y agoI got 4TB of TLC for $230 (Silicon Power UD90). It even has SLC caching (can use parts of the flash in SLC mode for short periods of time).
- jsheard 2y agoTrue, I was looking at the prices for higher end drives with on-board DRAM, but DRAM-less drives like that UD90 are also fine in the age of NVMe. Going DRAM-less was a significant compromise on SATA SSDs, but NVMe allows the drive to borrow a small chunk of system RAM over PCIe DMA, and in practice that works well enough. (Caveat: that DMA trick doesn't work if you put the drive in a USB enclosure, so if that's your use-case you should ideally still look for a drive with its own DRAM)
- NL807 2y agoThe point I was making is that there is no profit to be made by extending the life of drives. And sample size of one (i.e. you) is not representative of the market. There is always a demand for storage and people will keep buying worse products because there is no other choice.
- AnthonyMouse 2y agoI don't understand this logic. Consider the two possibilities here. The first is that only weird tech people are interested in doing this. Then they might as well allow it because it's a negligible proportion of the market but it makes those customers favor rather than dislike your brand, and makes them more likely to recommend your devices to others, which makes you some money. The second is that it would be widely popular and large numbers of customers would want to do it, and thereby choose the drives that allow it. Then if Samsung does it and SanDisk doesn't, or vice versa, they take more of the other's customers. Allowing it is the thing makes them more money. Meanwhile the thing that trashes most SSDs isn't wear, it's obsolescence. There are millions of ten year old QLC SSDs that are perfectly operational because they lived in a desktop and saw five drive writes over their entire existence. They're worthless not because they don't work, but because a drive which is newer and bigger and faster is $20. It costs the manufacturer nothing to let them be more reliable because they're going in the bin one way or the other. The status quo seems like MBAs cargo culting some heuristic where a company makes money in proportion to how evil they are. Companies actually make money in proportion to how much money they can get customers to spend with them. Which often has something to do with how much customers like them.
- userbinator 2y agoThere are millions of ten year old QLC SSDs In 2014 QLC was nothing but a research curiosity. The first QLC SSD was introduced in 2018: https://www.top500.org/news/intel-micron-ship-first-qlc-flash-memory-products/ https://www.top500.org/news/intel-micron-ship-first-qlc-flas... You have to also remember that people buy storage expecting it to last. I have decades-old magnetic media which is tiny but still readable.
- bayindirh 2y agoSamsung 870EVO (SSD), 980 Pro/990 Pro (NVMe) are all TLC drives. Kingston KC3000 is faster than 980 Pro, hence it's probably TLC, too.
- jsheard 2y agoA decent rule of thumb if that if a drive uses TLC, it will probably say so in the spec sheet. If it's left ambiguous then it's either QLC, or a lottery where the "same" model may be TLC or QLC.
- bayindirh 2y agoKingston NV2 is in that "what you get may differ" category, and Kingston explicitly says that what you get may change. I have two NV2s with differing die count, for example. Their controller might be different too. They're external, short-use drives, so I don't care. So, returning to previously mentioned ones, from their respective datasheets: - 870 EVO: Samsung V-NAND 3bit MLC - 980 Pro: Samsung V-NAND 3bit MLC - 990 Pro: Samsung V-NAND TLC - KC3000: NAND: 3D TLC - NV2: NAND: 3D // Explicit Lottery.
- ngcc_hk 2y agoA bit confused … the article is about Ssd drive with 500- M. Is what it said and discussed more details here applied to nvme drive with 1000+ M. Same?
- ComputerGuru 2y agoI bought up a lot of 960 and 970 Pro models when the 980 came out and it was TLC, to have MLC drives for logs and caches. Little did I know that TLC was just the beginning of the decline and QLC was right around the corner for even enterprise!
- foresto 2y agoThis table shows a lot of TLC models, at least some of which are still sold: https://www.johnnylucky.org/data-storage/ssd-database.html https://www.johnnylucky.org/data-storage/ssd-database.html
- numpad0 2y agoGreat thing about disks is that they don't require drivers at all. The driver settings Windows app is not going to be open sourced if such thing were to exist.
- surajrmal 2y agoWhile ssds do not, all flash chips do. So if you were ever going to try building your own SSD or simply connect some flash directly up to your soc via some extra pins, you would be able to program them this way. I imagine extending NVMe to offer this is possible if there was enough popular demand.
- namibj 2y agoNVMe already supports low level reformatting.
- Havoc 2y agoWild! I had assumed this is a hardware level distinction
- LoganDark 2y agoHow many bits a particular NAND chip can store per cell is presumably hardware-level, but I believe it's possible to achieve SLC on all of them anyway, even if they support TLC or QLC. Hell, the Silicon Power NVMe SSD I have in my machine right now will use SLC for writes, then (presumably) move that data later to TLC during periods of inactivity. Running the NAND in SLC mode is a feature of these drives, it's called "SLC caching".
- magicalhippo 2y agoOf course it is trivial to just write 000 for zero and 111 for one in the cells of a TLC SSD to turn it into effectively a SLC SSD, but that in itself doesn't explain why it's so much faster to read and write compared to TLC. For example, if it had been DRAM where the data is stored as charge on a capacitor, then one could imagine using a R-2R ladder DAC to write the values and a flash ADC to read the values. In that case there would be no speed difference between how many effective levels was stored per cell (ignoring noise and such). From what I can gather, the reason the pseudo-SLC mode is faster is down to how flash is programmed and read, and relies on the analog nature of flash memory. Like DRAM there's still a charge that's being used to store the value, however it's not just in a plain capacitor but in a double MOSFET gate[1]. The amount of charge changes the effective threshold voltage of the transistor. Thus to read, one needs to apply different voltages to see when the transistor starts to conduct[2]. To program a cell, one has to inject some amount of charge that puts the threshold voltage to a given value depending on which bit pattern you want to program. Since one can only inject charge, one must be careful not to overshoot. Thus one uses a series of brief pulses and then do a read cycle to see if the required level has been reached or not[3], repeating as needed. Thus the more levels per cell, the shorter pulses are needed and more read cycles to ensure the required amount of charge is reached. When programming the multi-level cell in single-level mode, you can get away with just a single, larger charge injection[4]. And when reading the value back, you just need to determine if the transistor conducts at a single level or not. So to sum up, pseudo-SLC does not require changes to the multi-level cells as such, but it does require changes to how those cells are programmed and read. So most likely it requires changing those circuits somewhat, meaning you can't implement this just in firmware. [1]: https://en.wikipedia.org/wiki/Flash_memory#Floating-gate_MOSFET https://en.wikipedia.org/wiki/Flash_memory#Floating-gate_MOS... [2]: https://dr.ntu.edu.sg/bitstream/10356/80559/1/Read%20and%20write%20voltage%20signal%20optimization%20for%20multi-level-cell%20%28mlc%29%20NAND%20flash%20memory.pdf https://dr.ntu.edu.sg/bitstream/10356/80559/1/Read%20and%20w... [3]: https://people.engr.tamu.edu/ajiang/CellProgram.pdf https://people.engr.tamu.edu/ajiang/CellProgram.pdf [4]: http://nyx.skku.ac.kr/publications/papers/ComboFTL.pdf http://nyx.skku.ac.kr/publications/papers/ComboFTL.pdf
- hwbunny 2y agoSilicon Motion controllers are trash.
- mardifoufs 2y agoI thought they were the best in class. What's the alternatives?
- nickcw 2y agoThis hack seems to take a 480GB SSD and transform it into a 120GB SSD However the write endurance (the amount of data you can write to the SSD before expecting failures) increases from 120TB to 4000TB which could be a very useful tradeoff, for example if you were using the disk to store logs. I've never seen this offered by the manufacturers though (maybe I haven't looked on the right place), I wonder why not?
- dist-epoch 2y agoManufacturers offer that, in the form of TLC drives. Which are supported, unlike this hack which might cause data loss. This gives you 120GB with 4000TB write endurance, but you can buy a 4TB TLC drive with 3000TB write endurance for $200.
- greggsy 2y agoThen you could use this technique to achieve something like a 1.2TB disk with 40PB TBW? I’d be fascinated to hear any potential use cases for that level of endurance in modern data storage.
- justinclift 2y ago> use cases for that level of endurance in modern data storage. All flash arrays. Saying that, as I have a bunch of smaller (400GB) 2.5" SAS SSDs combined into larger all-flash arrays, with each one of those SSD's rated for about 30PB of endurance. I'm expecting the servers to be dead by the time that endurance is exhausted though. ;)
- greggsy 2y agoExactly, I’ve done similar maths on my disks, and realised that it would be 20 years before they approach their end of life. By which point, they will be replaced for some new tech that will be cheaper, faster and more reliable and power efficient.
- causality0 2y ago
- kozak 2y agoSome Kingston SSDs allow you to manage over-provisioning (i.e. to choose the capacity-endurance tradeoff) by using a manufacturer-provided software tool.
- LoganDark 2y agoI don't think that would change how many bits are stored per cell, though? If you, say, set overprovisioning to 80%, then that's going to be 80% of the QLC capacity, and it's going to use the remaining 20% still in QLC mode, it's not going to recognize that it can use SLC with 20% of the SLC overprovisioned.
- Crosseye_Jack 2y agoYeah, all over provisioning does is gives the controller more spare cells to play with. The cells will still wear at the same rate as if you didn’t over provision, however depending on how the controller is wear leveling it could further improve the life of the drive because each cell is being used less often. This mod (I only just skimmed the post) provides a longer life not by using the cells less often (or keeping more in reserve), but by extending each cells life by decreasing the tolerance of charge needed to store the state of the cell, but in return decreasing the bits that can be stored in the cell so decreasing the capacity.
- DeathArrow 2y agoI thought memory QLC and TLC memory chips are different at the physical level, not that is just a matter of firmware.
- dist-epoch 2y agoThere are physical differences, QLC requires more precise hardware, since you need to distinguish between more charge levels. But you can display a low-quality picture on a high-definition screen, or in a camera sensor average 4 physical pixels to get a virtual one, same thing here, you combine together some charge levels for increased reliability. Put another way, you can turn a QLC into a TLC, but not the other way around.
- deleted 2y ago[deleted]
- wtallis 2y agoThe memory cells are identical. The peripheral circuitry for accessing the memory array gets more complicated as you support more bits per cell, and the SRAM page buffers have to get bigger to hold the extra bits. But everyone designs their NAND chips to support operating with fewer bits per cell. Sometimes TLC and QLC chips will be made in different sizes, so that each has the requisite number of memory cells to provide a capacity that's a power of two. But it's just as common for some of the chips to have an odd size, eg. Micron's first 3D NAND was sold as 256Gbit MLC or 384Gbit TLC (literally the same die), and more recently we've seen 1Tbit TLC and 1.33Tbit QLC parts from the same generation.
- willis936 2y agoI wish this kind of deep dive with bus transfer rates was more common. It would be great to have a block diagram that lists every important IC model number / working clock frequency + bus width / working clock rate between these ICs for every SSD.
- kasabali 2y agoYou don't need to go through all that trouble to use most cheap DRAMless SSDs in pSLC mode. You can simply under-provision them by using only 25-33% capacity. Most low end DRAMless controllers run in full disk caching mode. In other words, they first write *everything* in pSLC mode until all cells are written, only after there are no cells left they go back and rewrite/group some cells as TLC/QLC to free up some space. And they do it only when necessary, they don't go and do that in background to free up more space. So, if you simply create a partition 1/3 (for TLC) or 1/4 (for QLC) the size of the disk, make sure the remaining empty space is TRIMMED and never used, it'll be always writing in pSLC mode. You can verify the SSD you're interested in is running in this mode by searching for a "HD Tune" full drive write benchmark results for it. If The write speed is fast for the first 1/3-1/4 of the drive, then it dips to abysmal speeds for the rest, you can be sure the drive is using the full drive caching mode. As I said, most of these low-end DRAMless Silicon Motion/Phison/Maxion controllers are, but of course the manufacturer might've modified the firmware to use a smaller sized cache (like Crucial did for the test subject BX500).
- hengheng 2y agoHow can I verify that things stay this way? Partitioning off a small section of the drive feels very 160 GB SCSI "Let's only use the outer sectors".
- kasabali 2y agoEven keeping the drive always 75% empty would be enough, but partitioning off is the easiest way to make sure it's never exceed 25-33% full (assuming the drive behaves like that in the first place). To verify the drive uses the all of the drive as a cache, you can run full drive sequential write test (like the one in HD Tune Pro) and analyze the speed graph. If, say, a 480GB drive writes at full speed for the first 120GB, and then the write speed drops for the remaining 360GB, this means the drive is suitable for this kind of use. I think controllers might've been doing some GC jobs to always keep some amount of cells ready for pSLC use, but it should be a few GBs at most and shouldn't affect the use case depicted here.
- Dylan16807 2y ago
- justinclift 2y agoIt mentions the required tool being available from um... interesting places. Doing a Duck Duck Go search on the "SMI SM2259XT2 MPTool FIMN48 V0304A FWV0303B0" string in the article shows this place has the tool for download: https://www.usbdev.ru/files/smi/sm2259xt2mptool/ https://www.usbdev.ru/files/smi/sm2259xt2mptool/ The screenshot in the article looks to be captured from that site even. ;) Naturally, be careful with anything downloaded from there.
- gaius_baltar 2y agoThere were several instances were I saw an interesting tool for manipulating SSDs and SD cards only available from strange Russian websites. This one at least has an English UI ... A lot of research seems concentrated there and I wonder why it did not catch the same level of interest in the west.
- justinclift 2y agoYeah. That site has a lot of info for a huge number of flash controllers/chipsets/etc. Wish I had a bunch of spare time to burn on stuff like this. :)
- fuzzfactor 2y agoGood to see they are still available. The wide variety of controller/memory combinations makes it quite a moving target. This is the "mass production" software that makes it possible to provision, partition, format, and even place pre-arranged data or OS's in position before shipping freshly prepared drives to a bulk OEM customer. On one or more "identical" drives at the same time. For USB flash thumb drives the same approach is used. Factory software like this which is capable of modifying the firmware of the device is unfortunately about the only good way to determine the page size and erase block size of a particular USB drive. If the logical sectors storing your information are not aligned with the physical memory blocks (which somewhat correspond to the "obsolete" CHS geometry), the USB key will be slower than necessary, especially on writes. Due to write-amplification, and also it will wear out much sooner. Care does not go into thumb drives like you would expect from SSDs, seems like very often a single SKU will have untold variations in controller/memory chips. Also it seems likely that during the production discontinuities when the supply of one of these ICs on the BOM becomes depleted, it is substituted with a dissimilar enough chip that a revision of the partitioning, formatting, and data layout would be advised, but does not take place because nobody does it. And it still works anyway so nobody notices or cares. Or worse, it's recognized as an engineering downgrade but downplayed as if in denial. Wide variation in performance within a single SKU is a canary for this, which can sometimes be rectified.
- aristus 2y agoAbout ten years ago I got my hands on some of the last production FusionIO SLC cards for benchmarking. The software was an in-memory database that a customer wanted to use with expanded capacity. I literally just used the fusion cards as swap. After a few minutes of loading data, the kernel calmed down and it worked like a champ. Millions of transactions per second across billions of records, on a $500 computer... and a card that cost more than my car. Definitely wouldn't do it that way these days, but it was an impressive bit of kit.
- sargun 2y agoI worked at a place where I can say, FusionIO saved the company. W e had a single Postgres database which powered a significant portion of the app. We tried the kick off a horizontal scale project to little success around it - turns out that partitioning is hard on a complex, older codebase. Somehow we end up with a FusionIO card in tow. We go from something like 5,000 read QPS to 300k reads QPS on pgbench using the cheapest 2TB card. Ever since then, I’ve always thought that reaching for vertical scale is more tenable than I originally thought. It turns out hardware can do a lot more than we think.
- hinkley 2y agoThe slightly better solution for these situations is to set up a reverse proxy that sends all GET requests to a read replica and the server with the real database gets all of the write traffic. But the tricky bit there is that you may need to set up the response to contain the results of the read that is triggered by a successful write. Otherwise you have to solve lag problems on the replica.
- immibis 2y agoYou can get up to, I think, half a thousand cores in a single server, with multiple terabytes of RAM. You could run the entirety of Wikipedia's or Stack Overflow's o Hacker News's business logic in RAM on one server, though you'd still want replicas for bandwidth scaling and failover. Vertical scaling should certainly get back in vogue. Not to mention that individual servers, no matter how expensive, cost a tiny fraction of the equivalent cloud. Remember the LMAX Disruptor hype? Their pattern was essentially to funnel all the data for the entire business logic onto one core, and make sure that core doesn't take any bullshit - write the fastest L1-cacheable nonblocking serial code with input and output in ring buffers. Pipelined business processes can use one core per pipeline stage. They benchmarked 20 million transactions per second with this pattern - in 2011. They ran a stock exchange on it.
- RA2lover 2y agoCould this be used to extend the lifetime of an already worn-out SSD? I wonder if there's some business in china taking those and reflashing them as "new".
- dannyw 2y agoTechnically, QLC NAND that is no longer able to distinguish at QLC levels should certainly still be suitable as MLC for a while longer, and SLC, for all practical intents and purposes, forever.
- ComputerGuru 2y agoYes, but certainly no consumer or even enterprise ssd firmware has bothered to integrate that functionality.
- chasil 2y agoThe only rejuvenation process that I know is heat, either long period exposure to 250°C or short-term at higher temperature (800°C). https://m.hexus.net/tech/news/storage/48893-making-flash-memory-reliable-800c-heat-pulses/ https://m.hexus.net/tech/news/storage/48893-making-flash-mem... https://m.youtube.com/watch%3Fv%3DH4waJBeENVQ&sa=U&ved=2ahUKEwi8vZ-hnJqGAxXe5MkDHcDVDssQtwJ6BAgJEAE&usg=AOvVaw1W33ppIBhz_KnYwxTCv7Vn https://m.youtube.com/watch%3Fv%3DH4waJBeENVQ&sa=U&ved=2ahUK...
- justinclift 2y agoSo the trick is to somehow redirect all of the heat energy coming from cpus onto the storage, in bursts? :D
- kasabali 2y agoStay closer, now they're putting heatsinks on controller chips of SSDs :D
- ComputerGuru 2y ago
- loeg 2y agoDIWhy type stuff. Still, fun hack. TLC media has plenty of endurance. We see approximately 1.3-1.4x NAND write amplification in production workloads at ~35% fill rate with decent TRIMing.
- ComputerGuru 2y agoTFA reports a maximum write amplification factor of 3.75, which puts you in different ballgame territory altogether.
- loeg 2y agoThat's why I mentioned it. They claimed it improved to 1.8 in pSLC mode.
- userbinator 2y agoNot surprising given that it doesn't have to "compact" the data into TLC mode and thus rewrite it, if the whole drive is in SLC mode.
- riobard 2y agoIs it possible for SSD firmware to act “progressively” from SLC to MLC to TLC and to QLC (and maybe PLC in the future)? E.g. for a 1TB QLC SSD, it would act as SLC for usage under 256GB, then MLC under 512GB, then TLC under 768GB, and then QLC under 1TB (and PLC under 1280GB).
- wtallis 2y agoIt's theoretically possible, but in practice when a drive is getting close to full what makes sense is to compact data from the SLC cache into the densest configuration you're willing to allow, without any intermediate steps.
- hotstickyballs 2y agoThat's just a normal ssd rated at the QLC capacity.
- msarnoff 2y agoI’d also recommend this if you’re using eMMC in embedded devices. On a Linux system, you can use the `mmc` command from `mmc-utils` to configure your device in pSLC mode. It can also be done in U-Boot but the commands are a bit more obtuse. (It’s one-time programmable, so once set it’s irreversible.) In mass-production quantities, programming houses can preconfigure this and any other eMMC settings for you.
- eternityforest 2y agoThat makes eMMC slightly less awful!
- userbinator 2y agoWhat isn't prominently mentioned in the article is that endurance and retention are highly related --- flash cells wear out by becoming leakier with each cycle, and so the more cycles one goes through, the faster it'll lose its charge. The fact that SLC only requires distinguishing between two states instead of 16 for QLC means that the drive will also hold data for (much) longer in SLC mode for the same number of cycles. In other words, this mod doesn't only mean you get extreme endurance, but retention. This is usually specified by manufacturers as N years after M cycles; early SLC was rated for 10 years after 100K cycles, but this QLC might be 1 year after 900 cycles, or 1 year after 60K cycles in SLC mode; if you don't actually cycle the blocks that much, the retention will be much higher. I'm not sure if the firmware will still use the stronger ECC that's required for QLC vs. SLC even for SLC mode blocks, but if it does, that will also add to the reliability.