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You can simulate this on a GPU now. This is like running a CA on a GPU with slightly different rules. I think you would also be delighted to know that many of
by sitkack 3y ago
You can simulate this on a GPU now. This is like running a CA on a GPU with slightly different rules.
I think you would also be delighted to know that many of the non-GPU ai accelerators are in a mesh topology.
Cerebras, Tenstorrent, Esperanto
https://www.esperanto.ai/wp-content/uploads/2021/08/HC2021.Esperanto.Ditzel.Final_.pdf https://www.esperanto.ai/wp-content/uploads/2021/08/HC2021.E...
- mikewarot 3y agoI've been intrigued by this approach. On a more highly optimized (but harder to program) take is the GA144[1] from Chuck Moore, the inventor of Forth. It's a grid of 144 F18 Forth based processors in a cartesian grid. These processors are far more limited, but then again they take far less power as well. [1] https://www.greenarraychips.com/ https://www.greenarraychips.com/
- sitkack 3y agoThat is a pretty cool chip. Chuck Moore is a fascinating character. You would probably get a kick out of David Ackley's T2 Tile Project. https://t2tile.com/ https://t2tile.com/ https://www.youtube.com/@T2TileProject/videos https://www.youtube.com/@T2TileProject/videos https://www.youtube.com/@DaveAckley https://www.youtube.com/@DaveAckley https://en.wikipedia.org/wiki/Ackley_function https://en.wikipedia.org/wiki/Ackley_function https://www.cs.unm.edu/~ackley/ https://www.cs.unm.edu/~ackley/ Fun fact, Tenstorrent wanted to add instructions to enqueue data between processors connected in a mesh and Arm said no (they don't do architectural licenses anymore), so Tenstorrent used RISCV. Implementing something like a GA144 but using small RISC-V processors would be an interesting hack. https://www.youtube.com/watch?v=6QRKpd28NEE https://www.youtube.com/watch?v=6QRKpd28NEE