Why not use Verilog or SystemVerilog? module blinky ( input v3v3, input gnd ); wire led; wire led_r; rp2040 u1

Why not use Verilog or SystemVerilog? module blinky ( input v3v3, input gnd ); wire led; wire led_r; rp2040 u1 ( .vcc (v3v3), .gnd (gnd), .gpioa15 (led) ); resistor #(.VALUE("220"), .TOLERANCE("5%"), .PART("ERJH2CF1R10X"), .SIZE("1206")) r1 ( .a (led), .b (led_r) ); led #(.PART("WP7113SURDK14V")) d1 ( .anode (v3v3), .cathode (led_r) ); endmodule Use Verilog parameters for all of the part information you might want, like links to digikey part number.. or bury them into modules with different names. FWIW: Cadance "conceptHDL" is a schematic entry program which generates a Verilog netlist like this as its output (usually for board level simulation including ASICs and FPGAs). But if you're careful, Verilog could used directly as the input- the board-level schematic is pretty simple compared with the chip source code. I'm sure there is a tool somewhere to convert this into an EDIF netlist for Kicad or whatever. [Icarus can do it: https://steveicarus.github.io/iverilog/targets/tgt-fpga.html https://steveicarus.github.io/iverilog/targets/tgt-fpga.html ] Also: this is not limited to digital: there is a variant of Verilog called Verilog-AMS specifically designed for analog simulation. https://en.wikipedia.org/wiki/Verilog-AMS https://en.wikipedia.org/wiki/Verilog-AMS In Verilog-AMS, you can define a simulation models of your components: module resistor ( inout electrical a, inout electrical b ); parameter real R = 1.0; analog V(a,b) <+ R * I(a,b); endmodule module capacitor ( inout electrical p, inout electrical n ); parameter real c = 0; analog I(p,n) <+ c*ddt(V(p, n)); endmodule So not only do you get a component, but you also can simulate the whole thing before fabrication to catch mistakes.