5 ms·

The article doesn't note this, but wafer scale integration is a very old idea. We discussed it at Inmos back in the day, since often the systems we built essent

The article doesn't note this, but wafer scale integration is a very old idea. We discussed it at Inmos back in the day, since often the systems we built essentially consisted of many CPU die sliced out of the wafer, bonded into a package, then tiled onto a PCB[1]. But there are...issues: cooling for one. Iann Barron joked that you could make a toaster from two WSI wafers running full-tilt. [1] https://twitter.com/tnmoc/status/429638751904878592 https://twitter.com/tnmoc/status/429638751904878592

nickpsecurity 3y ago
There’s been quite a few. I can’t remember the first one I found which was also heavily analog. Here’s another: https://www.kip.uni-heidelberg.de/vision/previous-projects/facets/neuromorphic-hardware/waferscale-integration-system/hicann/ https://www.kip.uni-heidelberg.de/vision/previous-projects/f... https://iopscience.iop.org/article/10.1088/2634-4386/acf7e4 https://iopscience.iop.org/article/10.1088/2634-4386/acf7e4
- buildbot 3y ago
  The HICANN chip is really interesting, never seen or heard of it before!
nerpderp82 3y ago
That is super cool. I wrote to SGS-Thomson when I was in highschool and they sent me what felt like a refrigerator box of manuals for the 400 through the 9000. Huge transputer fan. The simplicity was striking, and that you could construct a system that could handle huge numbers of threads communicating across the network with almost no "system software" in the way was mind blowing. Most famously, Gene Amdahl started https://en.wikipedia.org/wiki/Trilogy_Systems https://en.wikipedia.org/wiki/Trilogy_Systems in the 80s to explore this idea. The calculus changes when you don't have to dice the wafer, packaging, etc. I'd say that we clock things now at the highest speed that we can safely remove heat, so these wafer scale chips, we trade frequency for area and need/should clock them much slower. At large production runs, the wafer in a Cerebras is 20k each for a system costing millions and the primary engineering feat is still cooling. I'd love to see a WSI system utilizing NTV (near threshold voltage) logic. https://semiengineering.com/near-threshold-computing-2/ https://semiengineering.com/near-threshold-computing-2/ Another interesting design pattern that has arisen is that Cerebras, Esperanto, Tenstorrent, and InspireSemi are all mesh networks using message passing. What kinds of things did you work on at Inmos?
- Pet_Ant 3y ago
  >> But there are...issues: cooling for one > That is super cool. ...so apparently not... ;)
  - jbverschoor 3y ago
    Can you not sandwich it with a peltier layer
    - deleted 3y ago
      [deleted]
- dboreham 3y ago
  I worked on board level designs and interfaces and memory subsystems among other things.
__MatrixMan__ 3y ago
> you could make a toaster from two WSI wafers running full-tilt. I'd totally eat compute toast, where can I get such a toaster?
- dylan604 3y ago
  There was a recent Ask HN about making a company to produce Made In USA toasters. Maybe you can pitch him this idea.
- dekhn 3y ago
  You could design it and have it manufactured fairly cheaply using JLCPCB. Design a simple PCB that is basically a long zig-zagged wire (copper trace). Make sure the trace has a fairly high resistance, like a few ohms. Include some heavy-duty connectors on the board. Send the design to JLCPCB; it usually takes a few days and costs almost nothing to have that shipped to the US. Design a base that holds two of the boards a fixed distance between each other, with room for toast, and build an enclosure. You also need a spring-loaded part to hold the toast in place and let you pop it out. Here's an example, sans JLC: https://www.instructables.com/PCB-Heater-Diy-Joule-heating/ https://www.instructables.com/PCB-Heater-Diy-Joule-heating/ Much of the challenge would be making this food safe, and consumer-safe, while also affordable and competitive with a $5 toaster, but that doesn't stop a sufficiently motivated hacker.
mrtksn 3y ago
Not exactly a wafer but once I tried to create a very powerful LED bulb by combining LEDs of multiple 10W LED bulbs close together and yep, it got very hard to cool it down. I wasn't expecting to get that hot but later once I gave it some thought, I said silly me of course it would be hard to cool it down. When you put together multiple elements that heat-up, the radiator-to-heater ratio quickly deteriorates. And now when I've red the title, the heat was the first thing that came to my mind.
- depereo 3y ago
  If there's serious work that can't be effectively done any other way then complex and esoteric cooling setups to overcome those challenges are fine to design and use. Not sure what needs 1600 cores in one 'chip' but it's probably fairly impressive.
  - mrtksn 3y ago
    Sure, at some point solving the cooling becomes the path with least resistance. It's just surprisingly hard if you have to account in the reliability and dimensions - so it depends on the application.
    - lazide 3y ago
      I haven’t done the math - why wouldn’t something as ‘simple’ as a die diameter solid copper slug work? Easy to drill for water cooling, and at these scales pretty cheap. Or are we talking just getting the heat out to whatever heat management device is attached without burning something in the chip itself?
      - mrtksn 3y ago
        In my understanding, normally you have a tiny chip that is inside a larger package and then you can attach that packaged chip to something that takes away the heat. So the ratio of cooling element(package + heat remover) to heating element(the IC) is pretty large. Also, the speed of removing heat from the silicon IC is limited to the heat conductivity of the silicon itself and the materials used to make the package. The silicon itself is not where the heating happens but on the "etched/printed" features on top of the silicon. Therefore, the amount of heat by heating elements(the tiny wires over the wafer) grow faster than the heat dissipation capacity, which rises the temperature until the unit breaks. Notice that when the heating elements are close together you lose the horizontal heat gradient advantage since that grows by the perimeter when the heat generating elements grow by the area. Which means you have to get creative, add moving parts or use more exotic materials, which makes the thing significantly more expensive and less reliable as more things to break are added.
cornholio 3y ago
The traditional computer chip will have a power draw proportional to frequency and the square of voltage, which itself must be increased to control delay and raise frequency: P ∝ C×V²×f So if you are ready to accept a lower speed per core, the power draw can be controlled and you won't get a toaster. One difficulty would be that modern technological nodes have high leakage and dissipate power even when they are not switching, making it more advantageous to clock aggressively, finish the computation as fast as possible and cut the power on that entire circuit for the remainder of the timer slot ("race to idle"), as opposed to reducing the frequency and prolonging the "on" phase. But that's a deliberate design choice, knowing the chip will be cut out and fitted with a substantial thermal solution. Wafer level power draw it's definitely something you can control at the design stage.
- BizarroLand 3y ago
  I wonder when we'll convert to plasma computing, as in the entire instruction set and operators running as a waveform in a condensed cloud of plasma where the voltage outs at specific points equal the computational result of the inputs? If we could do that then we could run terahertz frequencies.
  - AlotOfReading 3y ago
    How does whatever you're talking about differ from the thyratrons that were used in early vacuum tube computers and decidedly do not scale to THz clock frequencies?
  - jbverschoor 3y ago
    Do we really need a clock for computing?
    - tiberious726 3y ago
      Definitely not: https://www.achronix.com/ https://www.achronix.com/
im3w1l 3y ago
I'm not well versed in this subject but could you solve the heat issue by running the cores at low voltage and clock speeds?
- m463 3y ago
  I wonder if the performance increase of separating into chips that can be cooled might dwarf the impact of a slower cooler single wafer. I would also think a huge wafer like this would correlate with a data center, where cooling is less of an issue than say a laptop or desktop. or a wafer-phone :)
nmstoker 3y ago
Yes, I was going to say I thought this had been looked at with the transputer. I also recall Clive Sinclair suggesting this approach in the late 80s (can't recall if that was somehow related to the transputer or was completely separate). I believe his idea was that the faulty CPUs that naturally exist due to wafer defects would be cut off from the main group (I could have misremembered but I think it may have been via some kind of self test process).
- graemep 3y ago
  It looks like they were close to launching a product! https://qlwiki.qlforum.co.uk/doku.php?id=qlwiki:sinclair_wafer_ram_expansion https://qlwiki.qlforum.co.uk/doku.php?id=qlwiki:sinclair_waf... RAM, not CPU, but IIRC he was talking about CPUs too. and later there was a prototype storage product:: https://www.computinghistory.org.uk/det/3043/Anamartic-Wafer-Scale-160MB-Solid-State-Disk/ https://www.computinghistory.org.uk/det/3043/Anamartic-Wafer...
reason-mr 3y ago
Similarly cobweb: https://openaccess.city.ac.uk/id/eprint/28487/1/Anderson%20thesis%201990%20PDF-A.pdf https://openaccess.city.ac.uk/id/eprint/28487/1/Anderson%20t...
RantyDave 3y ago
I was going to say ... pretty sure I saw this on TV in the 1980's.

nickpsecurity 3y ago

There’s been quite a few. I can’t remember the first one I found which was also heavily analog. Here’s another: https://www.kip.uni-heidelberg.de/vision/previous-projects/facets/neuromorphic-hardware/waferscale-integration-system/hicann/ https://www.kip.uni-heidelberg.de/vision/previous-projects/f... https://iopscience.iop.org/article/10.1088/2634-4386/acf7e4 https://iopscience.iop.org/article/10.1088/2634-4386/acf7e4

buildbot 3y ago
The HICANN chip is really interesting, never seen or heard of it before!

nerpderp82 3y ago

That is super cool. I wrote to SGS-Thomson when I was in highschool and they sent me what felt like a refrigerator box of manuals for the 400 through the 9000. Huge transputer fan. The simplicity was striking, and that you could construct a system that could handle huge numbers of threads communicating across the network with almost no "system software" in the way was mind blowing. Most famously, Gene Amdahl started https://en.wikipedia.org/wiki/Trilogy_Systems https://en.wikipedia.org/wiki/Trilogy_Systems in the 80s to explore this idea. The calculus changes when you don't have to dice the wafer, packaging, etc. I'd say that we clock things now at the highest speed that we can safely remove heat, so these wafer scale chips, we trade frequency for area and need/should clock them much slower. At large production runs, the wafer in a Cerebras is 20k each for a system costing millions and the primary engineering feat is still cooling. I'd love to see a WSI system utilizing NTV (near threshold voltage) logic. https://semiengineering.com/near-threshold-computing-2/ https://semiengineering.com/near-threshold-computing-2/ Another interesting design pattern that has arisen is that Cerebras, Esperanto, Tenstorrent, and InspireSemi are all mesh networks using message passing. What kinds of things did you work on at Inmos?

Pet_Ant 3y ago
>> But there are...issues: cooling for one > That is super cool. ...so apparently not... ;)
- jbverschoor 3y ago
  Can you not sandwich it with a peltier layer
  - deleted 3y ago
    [deleted]
dboreham 3y ago
I worked on board level designs and interfaces and memory subsystems among other things.

__MatrixMan__ 3y ago

> you could make a toaster from two WSI wafers running full-tilt. I'd totally eat compute toast, where can I get such a toaster?

dylan604 3y ago
There was a recent Ask HN about making a company to produce Made In USA toasters. Maybe you can pitch him this idea.
dekhn 3y ago
You could design it and have it manufactured fairly cheaply using JLCPCB. Design a simple PCB that is basically a long zig-zagged wire (copper trace). Make sure the trace has a fairly high resistance, like a few ohms. Include some heavy-duty connectors on the board. Send the design to JLCPCB; it usually takes a few days and costs almost nothing to have that shipped to the US. Design a base that holds two of the boards a fixed distance between each other, with room for toast, and build an enclosure. You also need a spring-loaded part to hold the toast in place and let you pop it out. Here's an example, sans JLC: https://www.instructables.com/PCB-Heater-Diy-Joule-heating/ https://www.instructables.com/PCB-Heater-Diy-Joule-heating/ Much of the challenge would be making this food safe, and consumer-safe, while also affordable and competitive with a $5 toaster, but that doesn't stop a sufficiently motivated hacker.

mrtksn 3y ago

Not exactly a wafer but once I tried to create a very powerful LED bulb by combining LEDs of multiple 10W LED bulbs close together and yep, it got very hard to cool it down. I wasn't expecting to get that hot but later once I gave it some thought, I said silly me of course it would be hard to cool it down. When you put together multiple elements that heat-up, the radiator-to-heater ratio quickly deteriorates. And now when I've red the title, the heat was the first thing that came to my mind.

depereo 3y ago
If there's serious work that can't be effectively done any other way then complex and esoteric cooling setups to overcome those challenges are fine to design and use. Not sure what needs 1600 cores in one 'chip' but it's probably fairly impressive.
- mrtksn 3y ago
  Sure, at some point solving the cooling becomes the path with least resistance. It's just surprisingly hard if you have to account in the reliability and dimensions - so it depends on the application.
  - lazide 3y ago
    I haven’t done the math - why wouldn’t something as ‘simple’ as a die diameter solid copper slug work? Easy to drill for water cooling, and at these scales pretty cheap. Or are we talking just getting the heat out to whatever heat management device is attached without burning something in the chip itself?
    - mrtksn 3y ago
      In my understanding, normally you have a tiny chip that is inside a larger package and then you can attach that packaged chip to something that takes away the heat. So the ratio of cooling element(package + heat remover) to heating element(the IC) is pretty large. Also, the speed of removing heat from the silicon IC is limited to the heat conductivity of the silicon itself and the materials used to make the package. The silicon itself is not where the heating happens but on the "etched/printed" features on top of the silicon. Therefore, the amount of heat by heating elements(the tiny wires over the wafer) grow faster than the heat dissipation capacity, which rises the temperature until the unit breaks. Notice that when the heating elements are close together you lose the horizontal heat gradient advantage since that grows by the perimeter when the heat generating elements grow by the area. Which means you have to get creative, add moving parts or use more exotic materials, which makes the thing significantly more expensive and less reliable as more things to break are added.

cornholio 3y ago

The traditional computer chip will have a power draw proportional to frequency and the square of voltage, which itself must be increased to control delay and raise frequency: P ∝ C×V²×f So if you are ready to accept a lower speed per core, the power draw can be controlled and you won't get a toaster. One difficulty would be that modern technological nodes have high leakage and dissipate power even when they are not switching, making it more advantageous to clock aggressively, finish the computation as fast as possible and cut the power on that entire circuit for the remainder of the timer slot ("race to idle"), as opposed to reducing the frequency and prolonging the "on" phase. But that's a deliberate design choice, knowing the chip will be cut out and fitted with a substantial thermal solution. Wafer level power draw it's definitely something you can control at the design stage.

BizarroLand 3y ago
I wonder when we'll convert to plasma computing, as in the entire instruction set and operators running as a waveform in a condensed cloud of plasma where the voltage outs at specific points equal the computational result of the inputs? If we could do that then we could run terahertz frequencies.
- AlotOfReading 3y ago
  How does whatever you're talking about differ from the thyratrons that were used in early vacuum tube computers and decidedly do not scale to THz clock frequencies?
- jbverschoor 3y ago
  Do we really need a clock for computing?
  - tiberious726 3y ago
    Definitely not: https://www.achronix.com/ https://www.achronix.com/

im3w1l 3y ago

I'm not well versed in this subject but could you solve the heat issue by running the cores at low voltage and clock speeds?

m463 3y ago
I wonder if the performance increase of separating into chips that can be cooled might dwarf the impact of a slower cooler single wafer. I would also think a huge wafer like this would correlate with a data center, where cooling is less of an issue than say a laptop or desktop. or a wafer-phone :)

nmstoker 3y ago

Yes, I was going to say I thought this had been looked at with the transputer. I also recall Clive Sinclair suggesting this approach in the late 80s (can't recall if that was somehow related to the transputer or was completely separate). I believe his idea was that the faulty CPUs that naturally exist due to wafer defects would be cut off from the main group (I could have misremembered but I think it may have been via some kind of self test process).

graemep 3y ago
It looks like they were close to launching a product! https://qlwiki.qlforum.co.uk/doku.php?id=qlwiki:sinclair_wafer_ram_expansion https://qlwiki.qlforum.co.uk/doku.php?id=qlwiki:sinclair_waf... RAM, not CPU, but IIRC he was talking about CPUs too. and later there was a prototype storage product:: https://www.computinghistory.org.uk/det/3043/Anamartic-Wafer-Scale-160MB-Solid-State-Disk/ https://www.computinghistory.org.uk/det/3043/Anamartic-Wafer...

reason-mr 3y ago

Similarly cobweb: https://openaccess.city.ac.uk/id/eprint/28487/1/Anderson%20thesis%201990%20PDF-A.pdf https://openaccess.city.ac.uk/id/eprint/28487/1/Anderson%20t...

RantyDave 3y ago

I was going to say ... pretty sure I saw this on TV in the 1980's.