3 ms·
Author here for any questions :-) This is a change of pace from my x86 stuff, just a quick look at a 1982 Ethernet chip that unexpectedly used a second layer of
by kens 3y ago
Author here for any questions :-) This is a change of pace from my x86 stuff, just a quick look at a 1982 Ethernet chip that unexpectedly used a second layer of polysilicon for resistors.
- Genbox 3y agoGreat article Ken. I love the chip/die pictures.
- johnklos 3y agoThe Commodore A2065 ethernet card uses the Am7990, and I'm still using several of them in various Amiga systems, running both AmigaDOS and NetBSD. While trying to figure out some occasional network stalls, I looked at NetBSD's man le(4) page, which had an interesting note: Alas, the Am7990 chip is so old that AMD has "de-archived" the production information about it; pending a search elsewhere, we don't know how to identify the revision C chip from the date codes. Any chance this information is publicly available elsewhere? Always fascinating writeups, Ken! Thanks :)
- kens 3y agoSorry, I don't know where you would find that information.
- zeremy 3y agoNot sure how much this helps in identifying the actual chips, but, according to these datasheet sources, Revision C is dated June 1990 and Revision D is dated January 1992: https://archive.org/details/bitsavers_amdAm7990A_1770429 https://archive.org/details/bitsavers_amdAm7990A_1770429 (Rev. C) https://www.ardent-tool.com/datasheets/AMD_Am7990.pdf https://www.ardent-tool.com/datasheets/AMD_Am7990.pdf (Rev. D)
- virgulino 3y agoHappy New Year, Master Ken! Thank you for all the gifts you've given us this year, even on the last day! Cheers, from an island Brazil!
- yetanotherloser 3y agoNo questions, just want to say thanks for your amazing series of articles. I learned a lot from reading them.
- trogdor 3y agoI love your work. Unrelated to this piece, do you know of any resource that allows you to zoom in on a modern-process-node chip, from 1X down to the transistor level?
- retrac 3y agoSome ASIC designs are open source. That won't be down to the transistor level, but they are laid out at gate level. For example: https://tinytapeout.com/runs/tt02/ https://tinytapeout.com/runs/tt02/
- jecel 3y agoWhile the tool creates the chip by placing at the gate level, the designs themselves can be studied at the transistor level if you want. You can study the actual chip gds file or look up the gds for each standard cell individually.