3 ms·
Is there a good method to split out memory and CPU bottlenecks on a CPU? most folks simply optimize until they hit 100% and assume all CPU usage is created equa
by lumost 3y ago
Is there a good method to split out memory and CPU bottlenecks on a CPU? most folks simply optimize until they hit 100% and assume all CPU usage is created equal.
Seems like there needs to be a tool similar to htop with utiization stats for different instructions to indicate how much of the CPU is idle/busy.
- grogers 3y agoI think most people would measure instructions per cycle as an estimate of how busy the CPU execution units actually are. Lots of performance tools do measure it.
- dist1ll 3y agoIPC is not a good performance metric - especially for an instruction set like x86, but particularly for SIMD ISAs. Two seemingly similar instructions sequences may get decoded into a different number of uops, which in turn occupy different execution ports. The most extreme example of this being scalar code without stalls. It tends to have high IPC, even though it makes no use of FP/SIMD ports. Keeping the execution pipeline busy is not a useful goal in isolation. Really, IPC is better left as a sanity check.
- gnufx 3y agoConsider appropriate hardware counters. (Note that multiplexing to measure more then three(?) at once can be misleading.) At least for serial code on x86, there's "top-down performance analysis". Some tools (I know Maqao) suggest how to address bottlenecks.