3 ms·

How do they physically align all the parts? Do they have some kind of self-aligning mechanism or it's done with external manipulation? (Or maybe that's TSMC's

by mkj 3y ago

How do they physically align all the parts? Do they have some kind of self-aligning mechanism or it's done with external manipulation? (Or maybe that's TSMC's secret)

brucethemoose2 3y ago
Yeah, it is TSMC, see: https://3dfabric.tsmc.com/english/dedicatedFoundry/technology/3DFabric.htm https://3dfabric.tsmc.com/english/dedicatedFoundry/technolog... Older explanation, but lots of this stuff is just now shipping: https://www.anandtech.com/show/16051/3dfabric-the-home-for-tsmc-2-5d-and-3d-stacking-roadmap https://www.anandtech.com/show/16051/3dfabric-the-home-for-t... Not that AMD doesn't deserve any credit, they have considerable multi chip experience under their belt and undoubtedly served as a guinea pig/pipe cleaner for TSMC's advanced package.
amelius 3y ago
It doesn't sound very complicated compared to, say, aligning the masks.
- sylware 3y ago
  Ask ASML. The contraints all depend on the scale of the alignment required. I wonder what is the wavelength range used for their interferometers, and what kind of mecanical engines they use (probably piezo electric based engines).
- bob1029 3y ago
  I think the other parameters are way more difficult to get right than any optical system alignment considerations. Things like statistical process control make photolithography look less scary. You can check if you correctly patterned the wafer almost immediately. You won't know if the layer is any good until many process steps later. Maybe not for sure until EDS. Tuning the interactions between manufacturing processes is the actual secret sauce that all the manufacturers are trying to protect. How much dose on the EUV machine depends a lot on how you intend to etch the wafer. Imagine iteration cycles measured in months for changing individual floating point variables.
- crotchfire 3y ago
  The masks only need to be aligned during manufacturing. The chiplets need to stay aligned as temperatures change. Much more difficult.
  - lightedman 3y ago
    Not very difficult. Mask alignment is harder, soldering physics takes place once the oven temps begin and (usually) keeps things locked-down.
    - crotchfire 3y ago
      The MI300 chiplets don't use solder! Crazy stuff. Direct copper-to-copper bonding.

by mkj 3y ago

How do they physically align all the parts? Do they have some kind of self-aligning mechanism or it's done with external manipulation? (Or maybe that's TSMC's secret)

brucethemoose2 3y ago

Yeah, it is TSMC, see: https://3dfabric.tsmc.com/english/dedicatedFoundry/technology/3DFabric.htm https://3dfabric.tsmc.com/english/dedicatedFoundry/technolog... Older explanation, but lots of this stuff is just now shipping: https://www.anandtech.com/show/16051/3dfabric-the-home-for-tsmc-2-5d-and-3d-stacking-roadmap https://www.anandtech.com/show/16051/3dfabric-the-home-for-t... Not that AMD doesn't deserve any credit, they have considerable multi chip experience under their belt and undoubtedly served as a guinea pig/pipe cleaner for TSMC's advanced package.

amelius 3y ago

It doesn't sound very complicated compared to, say, aligning the masks.

sylware 3y ago
Ask ASML. The contraints all depend on the scale of the alignment required. I wonder what is the wavelength range used for their interferometers, and what kind of mecanical engines they use (probably piezo electric based engines).
bob1029 3y ago
I think the other parameters are way more difficult to get right than any optical system alignment considerations. Things like statistical process control make photolithography look less scary. You can check if you correctly patterned the wafer almost immediately. You won't know if the layer is any good until many process steps later. Maybe not for sure until EDS. Tuning the interactions between manufacturing processes is the actual secret sauce that all the manufacturers are trying to protect. How much dose on the EUV machine depends a lot on how you intend to etch the wafer. Imagine iteration cycles measured in months for changing individual floating point variables.
crotchfire 3y ago
The masks only need to be aligned during manufacturing. The chiplets need to stay aligned as temperatures change. Much more difficult.
- lightedman 3y ago
  Not very difficult. Mask alignment is harder, soldering physics takes place once the oven temps begin and (usually) keeps things locked-down.
  - crotchfire 3y ago
    The MI300 chiplets don't use solder! Crazy stuff. Direct copper-to-copper bonding.