5 ms·

Here's a pre-print paper I found: Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI https://upcommons.upc.edu/bitstrea

Here's a pre-print paper I found: Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI https://upcommons.upc.edu/bitstream/handle/2117/384912/sargantana_preprint.pdf https://upcommons.upc.edu/bitstream/handle/2117/384912/sarga... RV64GC with a subset of the v0.7.1 vector extension. 1.26GHz nominal clock on a 22nm process.

DeathArrow 3y ago
>22nm FD-SOI That's kind of not good news. I was hoping for 4nm to have some alterative to Intel/AMD/Apple.
- imiric 3y ago
  It's unrealistic to expect these chips to compete with modern manufacturing standards. Still, it's very impressive the progress RISC-V has made in the last few years. It's actually a viable option for many projects now.
- bibanez 3y ago
  Guess what you need to develop 4nm (spoiler, it’s a lot of money). There are many applications where 22nm is a good tradeoff.
  - helf 3y ago
    [dead]
- rwmj 3y ago
  You don't do your first experimental test chips on 4nm. That's where you get to when you have raised hundreds of millions after you've gone through several iterations to prove to investors you know what you're doing.
- stefs 3y ago
  i guess this chip is not for high end gaming machines or servers, but rather cars, industrial machine controlling, smart fridges, that kind of stuff. during covid production of many appliances ground to a halt because of various chip shortages. now what if for some reason asian chips became unavailable in europe (wars, natural catastrophes, ...)? cheap and easy to build is far more important than high end performance here.
- imtringued 3y ago
  Well then you're supposed to take a look at what Tenstorrent is doing. They haven't named their processor after a dragon slaying sword for no reason.
camel-cdr 3y ago
So an in-order core that is slightly faster than rocketchip in their benchmarks. That doesn't seem all that exciting, except for the vector extension, although they only support a small subset of it. Thats sounds similar to spatz [0] and given their numbers is slightly faster. [0] https://github.com/pulp-platform/spatz https://github.com/pulp-platform/spatz
- ansible 3y ago
  The previous DVINO was a 5-stage in-order, this Sargantana core is a 7-stage out-of-order write-back with register renaming and a non-blocking memory pipeline. So it is not a full in-order or a full out-of-order design.
  - galangalalgol 3y ago
    Are the vector extensions the fixed size ones or the originally proposed lanecount agnostic ones? That is the aspect of riscv i'm most excited about.
ksec 3y ago
> in 22nm FD-SOI That basically implies being Fabbed with Global Foundry inside EU ( Germany ).
0xDEF 3y ago
>RV64GC >C What is the purpose of including the RISC-V Compressed 16-bit extension set in what is supposed to be a HPC chip? Most embedded/IoT RISC-V implementations include that for obvious reasons but why here?
- cmrx64 3y ago
  the same reasons motivating C still apply at HPC: higher code density means fewer bits wasted representing redundant information, better cache utilization, minimization of memory fetch bandwidth, etc. basically, every metric derived from code size is happier when you have 20-30% fewer bits representing it.
- brucehoult 3y ago
  If you don't have the C extension then you can't run off the shelf Linux distros such as Fedora, Debian, Ubuntu, Arch and are limited to what you compile yourself e.g. Buildroot / Yocto. However the actual academic paper says it's RV64G, no C.
  - cmrx64 3y ago
    The RVV here isn’t compatible with mainstream Linux anyway.
    - vitarnixofntrnt 3y ago
      [dead]
  - ansible 3y ago
    Thanks for the correction Bruce. I was in a rush (never post when you are in a rush, or drunk, or angry) and I was so used to seeing RV64GC that I didn't notice the absence of the 'C'.
- deleted 3y ago
  [deleted]
darksaints 3y ago
That sounds like the perfect high end MCU core. Doesn’t say what the target use case is, but if it’s like other RISC-V announcements, they’re probably talking about general purpose CPUs, in which case those specs are pretty disappointing. It’s a shame that RISC-V has made so little impact in embedded electronics.
- albuic 3y ago
  It has made lots of impacts but just not publicly (in embedded like hard drives, eytc...). Also there is not as much spent in advertisement in comparison to "the brand new Apple chip" which is backed by a company with deep pockets (and which evidently is also more powerful)

DeathArrow 3y ago

>22nm FD-SOI That's kind of not good news. I was hoping for 4nm to have some alterative to Intel/AMD/Apple.

imiric 3y ago
It's unrealistic to expect these chips to compete with modern manufacturing standards. Still, it's very impressive the progress RISC-V has made in the last few years. It's actually a viable option for many projects now.
bibanez 3y ago
Guess what you need to develop 4nm (spoiler, it’s a lot of money). There are many applications where 22nm is a good tradeoff.
- helf 3y ago
  [dead]
rwmj 3y ago
You don't do your first experimental test chips on 4nm. That's where you get to when you have raised hundreds of millions after you've gone through several iterations to prove to investors you know what you're doing.
stefs 3y ago
i guess this chip is not for high end gaming machines or servers, but rather cars, industrial machine controlling, smart fridges, that kind of stuff. during covid production of many appliances ground to a halt because of various chip shortages. now what if for some reason asian chips became unavailable in europe (wars, natural catastrophes, ...)? cheap and easy to build is far more important than high end performance here.
imtringued 3y ago
Well then you're supposed to take a look at what Tenstorrent is doing. They haven't named their processor after a dragon slaying sword for no reason.

camel-cdr 3y ago

So an in-order core that is slightly faster than rocketchip in their benchmarks. That doesn't seem all that exciting, except for the vector extension, although they only support a small subset of it. Thats sounds similar to spatz [0] and given their numbers is slightly faster. [0] https://github.com/pulp-platform/spatz https://github.com/pulp-platform/spatz

ansible 3y ago
The previous DVINO was a 5-stage in-order, this Sargantana core is a 7-stage out-of-order write-back with register renaming and a non-blocking memory pipeline. So it is not a full in-order or a full out-of-order design.
- galangalalgol 3y ago
  Are the vector extensions the fixed size ones or the originally proposed lanecount agnostic ones? That is the aspect of riscv i'm most excited about.

ksec 3y ago

> in 22nm FD-SOI That basically implies being Fabbed with Global Foundry inside EU ( Germany ).

0xDEF 3y ago

>RV64GC >C What is the purpose of including the RISC-V Compressed 16-bit extension set in what is supposed to be a HPC chip? Most embedded/IoT RISC-V implementations include that for obvious reasons but why here?

cmrx64 3y ago
the same reasons motivating C still apply at HPC: higher code density means fewer bits wasted representing redundant information, better cache utilization, minimization of memory fetch bandwidth, etc. basically, every metric derived from code size is happier when you have 20-30% fewer bits representing it.
brucehoult 3y ago
If you don't have the C extension then you can't run off the shelf Linux distros such as Fedora, Debian, Ubuntu, Arch and are limited to what you compile yourself e.g. Buildroot / Yocto. However the actual academic paper says it's RV64G, no C.
- cmrx64 3y ago
  The RVV here isn’t compatible with mainstream Linux anyway.
  - vitarnixofntrnt 3y ago
    [dead]
- ansible 3y ago
  Thanks for the correction Bruce. I was in a rush (never post when you are in a rush, or drunk, or angry) and I was so used to seeing RV64GC that I didn't notice the absence of the 'C'.
deleted 3y ago
[deleted]

darksaints 3y ago

That sounds like the perfect high end MCU core. Doesn’t say what the target use case is, but if it’s like other RISC-V announcements, they’re probably talking about general purpose CPUs, in which case those specs are pretty disappointing. It’s a shame that RISC-V has made so little impact in embedded electronics.

albuic 3y ago
It has made lots of impacts but just not publicly (in embedded like hard drives, eytc...). Also there is not as much spent in advertisement in comparison to "the brand new Apple chip" which is backed by a company with deep pockets (and which evidently is also more powerful)