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x86 is a legacy platform, ia64 could've served the niche this article is catering toward, f.e. HPC and data center. Sadly intel squandered Itanium by being acti

x86 is a legacy platform, ia64 could've served the niche this article is catering toward, f.e. HPC and data center. Sadly intel squandered Itanium by being actively hostile towards developers

__alexs 3y ago
This is not your great grandmas x86.
tyingq 3y ago
I would guess the "actively hostile" part had a lot to do with all the time and effort to get the compiler to make good use of Itanium. Hard to focus on developers without that foundation. And they never got there.
- rbanffy 3y ago
  Not having a good C compiler is pretty much a blocker for any general purpose processor being successfully released. If you can't run actual software faster than your competition, your theoretical benefits remain just that.
  - tyingq 3y ago
    To give them some grace, it compiled "made for VLIW" code for Itanium well, where it would reap the benefits. It couldn't do much with existing code to make it efficient.
    - rbanffy 3y ago
      What does "made for VLIW" imply? Using intrinsics?
      - tyingq 3y ago
        Some combination of strategies. Grabbing an old Itanium Developer's manual, the suggested rewrites include making loops branchless where possible, balancing instruction depth for branches that can't be avoided, doing more comparisons in parallel rather than if X -> then if Y, and so on. Obviously, this doesn't apply to every general purpose problem. Just noting there were some narrow cases where writing for Itanium produced something close to the promise.
        rbanffy 3y ago
        Just downloaded their manuals. Should be an interesting read. I remember their Xeon Phi ones were very nice as well. I miss those machines.
imtringued 3y ago
>ia64 could've served the niche this article is catering toward No it can't. Itanium is a terrible design due to combining both static scheduling and pointless complexity. The worst of both worlds. If you really insisted on static scheduling, you would implement an EDGE [0] architecture. The idea is quite simple. Programs consist of instruction blocks with a finite size. The CPU performs some very basic scheduling on the block level so the expectation is that the compiler optimizes one block at a time. Additionally, these blocks can reference other blocks and form a graph to make up a complete program. The processor then schedules the instruction blocks dynamically. Tachyum built such a processor and it turns out they built it out of order anyway. [0] https://en.wikipedia.org/wiki/Explicit_data_graph_execution https://en.wikipedia.org/wiki/Explicit_data_graph_execution

x86 is a legacy platform, ia64 could've served the niche this article is catering toward, f.e. HPC and data center. Sadly intel squandered Itanium by being actively hostile towards developers

__alexs 3y ago

This is not your great grandmas x86.

tyingq 3y ago

I would guess the "actively hostile" part had a lot to do with all the time and effort to get the compiler to make good use of Itanium. Hard to focus on developers without that foundation. And they never got there.

rbanffy 3y ago
Not having a good C compiler is pretty much a blocker for any general purpose processor being successfully released. If you can't run actual software faster than your competition, your theoretical benefits remain just that.
- tyingq 3y ago
  To give them some grace, it compiled "made for VLIW" code for Itanium well, where it would reap the benefits. It couldn't do much with existing code to make it efficient.
  - rbanffy 3y ago
    What does "made for VLIW" imply? Using intrinsics?
    - tyingq 3y ago
      Some combination of strategies. Grabbing an old Itanium Developer's manual, the suggested rewrites include making loops branchless where possible, balancing instruction depth for branches that can't be avoided, doing more comparisons in parallel rather than if X -> then if Y, and so on. Obviously, this doesn't apply to every general purpose problem. Just noting there were some narrow cases where writing for Itanium produced something close to the promise.
      - rbanffy 3y ago
        Just downloaded their manuals. Should be an interesting read. I remember their Xeon Phi ones were very nice as well. I miss those machines.

imtringued 3y ago

>ia64 could've served the niche this article is catering toward No it can't. Itanium is a terrible design due to combining both static scheduling and pointless complexity. The worst of both worlds. If you really insisted on static scheduling, you would implement an EDGE [0] architecture. The idea is quite simple. Programs consist of instruction blocks with a finite size. The CPU performs some very basic scheduling on the block level so the expectation is that the compiler optimizes one block at a time. Additionally, these blocks can reference other blocks and form a graph to make up a complete program. The processor then schedules the instruction blocks dynamically. Tachyum built such a processor and it turns out they built it out of order anyway. [0] https://en.wikipedia.org/wiki/Explicit_data_graph_execution https://en.wikipedia.org/wiki/Explicit_data_graph_execution