4 ms·

How different are the instruction sets of the 80486 and Pentium from the 386? Put another way, had the instruction set been frozen as of the 386 (barring any re

by TMWNN 3y ago

How different are the instruction sets of the 80486 and Pentium from the 386? Put another way, had the instruction set been frozen as of the 386 (barring any required changes for 64-bit), would we notice any difference in performance today?

jstanley 3y ago
In specialised applications, you'd definitely miss AVX and SSE. Beyond that, I'm not sure.
api 3y ago
Vector instructions are the obvious thing and being massive gains to media, cryptography, math, AI, graphics, and signal processing. Beyond that there have been a few additions like CMOV (conditional move) that would be missed, though instruction fusion in pipelines can sometimes achieve the same speed up. Lastly you would have to add some atomic instructions to support SMP.
- clausecker 3y ago
  CMOV is very important for high-performance programming as it greatly simplifies the design of branchless code. There are workarounds, but they either involve conditional branches (you don't want these) or increase the critical path latency significantly (the simplest workaround is to materialise the carry flag using SBB, then use that as a mask).
pkaye 3y ago
I think the early Pentiums are pretty close to the instruction set of the 80386. However there were many iterations to the Pentium that added new instruction like the MMX.
duskwuff 3y ago
80486 and Pentium added relatively few instructions to the core instruction set, but there are a couple of pretty important tools which got added. The ones you'd miss the most would probably be: * CMPXCHG (486). Central to multiprocessor synchronization and locking. * CPUID (P6). Admittedly, if the instruction set were frozen you wouldn't need this... but if not, it's how you detect what CPU you're running on and what it supports. * RDMSR/WRMSR (P6, kernel only). A general-purpose mechanism for adding extra special-purpose registers to the CPU without having to allocate an instruction to each one. * INVD/WBINVD/INVLPG (486, kernel only). This was the first Intel CPU to support cache; these instructions were used to manage it.
- userbinator 3y ago
  CPUID was available on late-model 486s too.
- deleted 3y ago
  [deleted]
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tssva 3y ago
The 486 added XADD, BSWAP, CMPXCHG, INVD, WBINVD, INVLPG to the instruction set. The original Pentiums added CPUID, CMPXCHG8B, RDTSC, RDMSR, WRMSR, RSM to the instruction set. Later Pentiums added the MMX instruction set.
giantrobot 3y ago
Even besides new instructions the 486 and then Pentium ran existing x86 code faster than the 386 clock for clock. Various new instructions did add capability but just running existing code faster was a huge win on subsequent chips.
- TacticalCoder 3y ago
  Yeah. Not many new instructions but many instructions required less cycles per instruction and the 486 also got way bigger caches. And the integrated FPU (IIRC the FPU was an add-on for the 386). Switching from a 386 to a 486 was bringing a huge speedup back then.
epcoa 3y ago
Yes. For one no one has mentioned that the 386 itself had no on die hardware floating point. That seems like a huge one. Even if only a few instructions were added to the “core” some are huge like CMPXCHG, CMOV and although not an instruction itself the LOCK prefix. But the extensions are huge. We don’t even still use the floating point instructions of the 386/387 era. MMX was pretty lame but SSE and AVX are critical. AES-NI is now necessary for most people with FDE commonplace.
- toast0 3y ago
  > although not an instruction itself the LOCK prefix. From what I can tell, the 386 had the LOCK prefix. Pin 26 (bottom left) is LOCK# driven by the LOCK prefix [1]. But CMPXCHG is very useful and wasn't available until 486, and Pentium added some other stuff that's important. [1] https://www.eeeguide.com/intel-80386-pin-diagram-description/ https://www.eeeguide.com/intel-80386-pin-diagram-description...
  - epcoa 3y ago
    My mistake.
  - userbinator 3y ago
    The 8086 had the LOCK prefix. Intel was thinking of multiprocessing from the beginning.

by TMWNN 3y ago

jstanley 3y ago

In specialised applications, you'd definitely miss AVX and SSE. Beyond that, I'm not sure.

api 3y ago

Vector instructions are the obvious thing and being massive gains to media, cryptography, math, AI, graphics, and signal processing. Beyond that there have been a few additions like CMOV (conditional move) that would be missed, though instruction fusion in pipelines can sometimes achieve the same speed up. Lastly you would have to add some atomic instructions to support SMP.

clausecker 3y ago
CMOV is very important for high-performance programming as it greatly simplifies the design of branchless code. There are workarounds, but they either involve conditional branches (you don't want these) or increase the critical path latency significantly (the simplest workaround is to materialise the carry flag using SBB, then use that as a mask).

pkaye 3y ago

I think the early Pentiums are pretty close to the instruction set of the 80386. However there were many iterations to the Pentium that added new instruction like the MMX.

duskwuff 3y ago

80486 and Pentium added relatively few instructions to the core instruction set, but there are a couple of pretty important tools which got added. The ones you'd miss the most would probably be: * CMPXCHG (486). Central to multiprocessor synchronization and locking. * CPUID (P6). Admittedly, if the instruction set were frozen you wouldn't need this... but if not, it's how you detect what CPU you're running on and what it supports. * RDMSR/WRMSR (P6, kernel only). A general-purpose mechanism for adding extra special-purpose registers to the CPU without having to allocate an instruction to each one. * INVD/WBINVD/INVLPG (486, kernel only). This was the first Intel CPU to support cache; these instructions were used to manage it.

userbinator 3y ago
CPUID was available on late-model 486s too.
deleted 3y ago
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deleted 3y ago

[deleted]

tssva 3y ago

The 486 added XADD, BSWAP, CMPXCHG, INVD, WBINVD, INVLPG to the instruction set. The original Pentiums added CPUID, CMPXCHG8B, RDTSC, RDMSR, WRMSR, RSM to the instruction set. Later Pentiums added the MMX instruction set.

giantrobot 3y ago

Even besides new instructions the 486 and then Pentium ran existing x86 code faster than the 386 clock for clock. Various new instructions did add capability but just running existing code faster was a huge win on subsequent chips.

TacticalCoder 3y ago
Yeah. Not many new instructions but many instructions required less cycles per instruction and the 486 also got way bigger caches. And the integrated FPU (IIRC the FPU was an add-on for the 386). Switching from a 386 to a 486 was bringing a huge speedup back then.

epcoa 3y ago

Yes. For one no one has mentioned that the 386 itself had no on die hardware floating point. That seems like a huge one. Even if only a few instructions were added to the “core” some are huge like CMPXCHG, CMOV and although not an instruction itself the LOCK prefix. But the extensions are huge. We don’t even still use the floating point instructions of the 386/387 era. MMX was pretty lame but SSE and AVX are critical. AES-NI is now necessary for most people with FDE commonplace.

toast0 3y ago
> although not an instruction itself the LOCK prefix. From what I can tell, the 386 had the LOCK prefix. Pin 26 (bottom left) is LOCK# driven by the LOCK prefix [1]. But CMPXCHG is very useful and wasn't available until 486, and Pentium added some other stuff that's important. [1] https://www.eeeguide.com/intel-80386-pin-diagram-description/ https://www.eeeguide.com/intel-80386-pin-diagram-description...
- epcoa 3y ago
  My mistake.
- userbinator 3y ago
  The 8086 had the LOCK prefix. Intel was thinking of multiprocessing from the beginning.