4 ms·

BeagleBoard Announces BeagleV-Fire with RISC-V and FPGA

23 points by FinnKuhn 3y ago

mikestew 3y ago
Really, no discussion on a $150 SBC with an FPGA? Seems like a useful combination, see what that RISC-V is all about, and I can learn me some FPGA on the cheap. Or is this not the decent price I think it is?
- tw04 3y ago
  Keep in mind to actually program the FPGA I believe you need Libero Studio which is $1k/year for the cheapest license I can find. I'm not in the space so maybe there's an alternative, but the board is the least of your worries if you actually want to do something useful with it.
  - brucehoult 3y ago
    Libero Silver, free. You do need to re-register every 12 months. The same chip, but in 250k LUT version has been available on the Microsemi Icicle for $499 since late 2020. You can find that on Digikey and Mouser.
- rasz 3y ago
  DE10-Nano used to be ~$100 2 years ago before FPGA vendors decided to stop manufacturing while bumping prices. $30 is a good price for FPGA dev board, requires a little creativity https://github.com/q3k/chubby75/tree/master https://github.com/q3k/chubby75/tree/master
  - snvzz 3y ago
    I am hopeful we'll have a "miSTress" or some similar such name as followup to miST/miSTer. To adopt a cheaper, more modern, and more powerful FPGA ecosystem that's actually supported by the yosys/nextpnr open stack. And, while at it, the control plane CPU would be standard RISC-V instead of legacy ISA (currently ARM). Something like Lattice ECP5 or GOWIN's GW2N. On that, Sipeed recently announced a cheap 135K LUT devboard[0] based on GW2N. Apparently, a version with ~500k LUT is in the works. 0. https://www.cnx-software.com/2023/10/01/sipeed-tang-mega-138k-pro-dock-features-gowin-gw5ast-fpga-risc-v-soc/ https://www.cnx-software.com/2023/10/01/sipeed-tang-mega-138...
  - brucehoult 3y ago
    Two Cortex-A9s are better than soft cores, for sure, but pretty far from four 64 bit U54 applications processors plus a 64 bit S51 [1] real-time core if you want to do any serious CPU-based processing. [1] called E51 when this U54-MC core complex first came out in the FU-540 SoC on the HiFive Unleashed in 2018. That was running at 1.0 - 1.5 GHz vs 667 MHz in this FPGA, but otherwise the same thing.
- bsder 3y ago
  > Really, no discussion on a $150 SBC with an FPGA? Seems like a useful combination It's really not. The problem is that you either need to be able to draw schematics or you need to be able to design in Verilog or VHDL. That means 99.99% of all programmers are excluded. And this is before we start talking about the FPGA development tools which all suuuuuuuck. If, however, you have something like the PRU on the Beaglebone Black (or the much more limited PIO on the RP2020 for example), your standard systems programmers can develop code for your board. That's a huge win over using an FPGA. This, in fact, where I was really hoping RISC-V would shine. Have a couple of high power RV64I cores (Cortex-A equivalent) that can run an OS in soft real time and a couple of low power RV32I cores (Cortex-M equivalent) connected directly to the pins and running in hard real time. And, since everything is all RISC-V, the tooling is the same so you don't have to learn some esoteric thing (TI PRU or RP2040 PIO). Alas. The problem is that the RISC-V people all want to be making the sexy thing instead of the thing that will ship a zillion units. (I mean, that Microchip SoC is like $40 in quantity! You can get a pretty powerful ARM SoC for $20 and a remarkably big FPGA for another $20 and be WAY ahead.)
  - brucehoult 3y ago
    > This, in fact, where I was really hoping RISC-V would shine. Have a couple of high power RV64I cores (Cortex-A equivalent) that can run an OS in soft real time and a couple of low power RV32I cores (Cortex-M equivalent) connected directly to the pins and running in hard real time. You have perhaps missed the BL808 (C906 applications processor RV64GCV 480MHz, plus RV32GCP 320MHz real-time core, plus RV32EMC 160MHz core primarily controlling the WIFI/BT) and CV1800B (C906 RV64GCV 1 GHz for Linux, plus C906 RV64GC 700 MHz for real-time), both with 64 MB on chip PSRAM and available on boards under $10: Sipeed M1s Dock, Pine64 Ox64, Milk-V Duo. However, while many things are fine with sequential processing on a few hundred MIPS conventional CPU or PIO, some things need the parallelism of an FPGA fabric. Yes, it's harder to use but that's equally true on your cheap iCE40 (or whatever) attached to an MCU by a few pins. Beagleboard products are always expensive. They are aimed at purchase-order corporate users, always available in stock in major distributors such as Digikey on the day of announcement, and have got margin built in for the distributor.
snvzz 3y ago
It's fairly cool. But it'd be cooler if the FPGA actually had documentation. That would allow using the open stack (yosys+nextpnr). But few vendors provide these documents (QuickLogic), and otherwise most of the supported families are so thanks to reverse engineering. Quite sad. In practice, most hobbyists will simply avoid garbage vendor tools, and development boards (like this one) that need them. Instead, they'll get e.g. QuickLogic, Lattice iCE40/ECP5 or GOWIN GW1N/GW2N, on some cheap development board[0]. Yes, hobbyists and students are "the bottom", but winning them has historically been how you eventually win the industry as a whole. 0. https://www.joelw.id.au/FPGA/CheapFPGADevelopmentBoards https://www.joelw.id.au/FPGA/CheapFPGADevelopmentBoards

23 points by FinnKuhn 3y ago

Really, no discussion on a $150 SBC with an FPGA? Seems like a useful combination, see what that RISC-V is all about, and I can learn me some FPGA on the cheap. Or is this not the decent price I think it is?

tw04 3y ago
Keep in mind to actually program the FPGA I believe you need Libero Studio which is $1k/year for the cheapest license I can find. I'm not in the space so maybe there's an alternative, but the board is the least of your worries if you actually want to do something useful with it.
- brucehoult 3y ago
  Libero Silver, free. You do need to re-register every 12 months. The same chip, but in 250k LUT version has been available on the Microsemi Icicle for $499 since late 2020. You can find that on Digikey and Mouser.
rasz 3y ago
DE10-Nano used to be ~$100 2 years ago before FPGA vendors decided to stop manufacturing while bumping prices. $30 is a good price for FPGA dev board, requires a little creativity https://github.com/q3k/chubby75/tree/master https://github.com/q3k/chubby75/tree/master
- snvzz 3y ago
  I am hopeful we'll have a "miSTress" or some similar such name as followup to miST/miSTer. To adopt a cheaper, more modern, and more powerful FPGA ecosystem that's actually supported by the yosys/nextpnr open stack. And, while at it, the control plane CPU would be standard RISC-V instead of legacy ISA (currently ARM). Something like Lattice ECP5 or GOWIN's GW2N. On that, Sipeed recently announced a cheap 135K LUT devboard[0] based on GW2N. Apparently, a version with ~500k LUT is in the works. 0. https://www.cnx-software.com/2023/10/01/sipeed-tang-mega-138k-pro-dock-features-gowin-gw5ast-fpga-risc-v-soc/ https://www.cnx-software.com/2023/10/01/sipeed-tang-mega-138...
- brucehoult 3y ago
  Two Cortex-A9s are better than soft cores, for sure, but pretty far from four 64 bit U54 applications processors plus a 64 bit S51 [1] real-time core if you want to do any serious CPU-based processing. [1] called E51 when this U54-MC core complex first came out in the FU-540 SoC on the HiFive Unleashed in 2018. That was running at 1.0 - 1.5 GHz vs 667 MHz in this FPGA, but otherwise the same thing.
bsder 3y ago
> Really, no discussion on a $150 SBC with an FPGA? Seems like a useful combination It's really not. The problem is that you either need to be able to draw schematics or you need to be able to design in Verilog or VHDL. That means 99.99% of all programmers are excluded. And this is before we start talking about the FPGA development tools which all suuuuuuuck. If, however, you have something like the PRU on the Beaglebone Black (or the much more limited PIO on the RP2020 for example), your standard systems programmers can develop code for your board. That's a huge win over using an FPGA. This, in fact, where I was really hoping RISC-V would shine. Have a couple of high power RV64I cores (Cortex-A equivalent) that can run an OS in soft real time and a couple of low power RV32I cores (Cortex-M equivalent) connected directly to the pins and running in hard real time. And, since everything is all RISC-V, the tooling is the same so you don't have to learn some esoteric thing (TI PRU or RP2040 PIO). Alas. The problem is that the RISC-V people all want to be making the sexy thing instead of the thing that will ship a zillion units. (I mean, that Microchip SoC is like $40 in quantity! You can get a pretty powerful ARM SoC for $20 and a remarkably big FPGA for another $20 and be WAY ahead.)
- brucehoult 3y ago
  > This, in fact, where I was really hoping RISC-V would shine. Have a couple of high power RV64I cores (Cortex-A equivalent) that can run an OS in soft real time and a couple of low power RV32I cores (Cortex-M equivalent) connected directly to the pins and running in hard real time. You have perhaps missed the BL808 (C906 applications processor RV64GCV 480MHz, plus RV32GCP 320MHz real-time core, plus RV32EMC 160MHz core primarily controlling the WIFI/BT) and CV1800B (C906 RV64GCV 1 GHz for Linux, plus C906 RV64GC 700 MHz for real-time), both with 64 MB on chip PSRAM and available on boards under $10: Sipeed M1s Dock, Pine64 Ox64, Milk-V Duo. However, while many things are fine with sequential processing on a few hundred MIPS conventional CPU or PIO, some things need the parallelism of an FPGA fabric. Yes, it's harder to use but that's equally true on your cheap iCE40 (or whatever) attached to an MCU by a few pins. Beagleboard products are always expensive. They are aimed at purchase-order corporate users, always available in stock in major distributors such as Digikey on the day of announcement, and have got margin built in for the distributor.

snvzz 3y ago

It's fairly cool. But it'd be cooler if the FPGA actually had documentation. That would allow using the open stack (yosys+nextpnr). But few vendors provide these documents (QuickLogic), and otherwise most of the supported families are so thanks to reverse engineering. Quite sad. In practice, most hobbyists will simply avoid garbage vendor tools, and development boards (like this one) that need them. Instead, they'll get e.g. QuickLogic, Lattice iCE40/ECP5 or GOWIN GW1N/GW2N, on some cheap development board[0]. Yes, hobbyists and students are "the bottom", but winning them has historically been how you eventually win the industry as a whole. 0. https://www.joelw.id.au/FPGA/CheapFPGADevelopmentBoards https://www.joelw.id.au/FPGA/CheapFPGADevelopmentBoards