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The easiest way to try Skywater PDK is through TinyTapeout: https://tinytapeout.com/ https://tinytapeout.com/ -- highly recommended.

by krasin 3y ago

floxy 3y ago
Am I reading that correctly? For $50 you get ~1,000 transistors worth of die space, and it comes in a package? Are there any other limitations? Full-custom analog design if you wanted?
- krasin 3y ago
  > Am I reading that correctly? For $50 you get ~1,000 transistors worth of die space, and it comes in a package? That's correct, although it's $100: $50 for the space on the group-run chip and $50 for the physical stuff: the chip and the dev kit. > Are there any other limitations? Yes. Although, fewer and fewer with each next iteration. > Full-custom analog design if you wanted? For analog design, you would need to deal with https://efabless.com/ https://efabless.com/ directly, pay $10k and get 100 QFN chips back with your design some time later. TinyTapeout is digital-only, for now.
  - marktangotango 3y ago
    What kind of transistor count can one get with efabless? Ie novice way of asking how complex of a design can be implemented?
    - krasin 3y ago
      efabless gives 10 mm^2 of project space and the 130nm process node allows for 170kgates to 210kgates per mm^2. That translates to 1.7M-2.1M gates per chip. Sources: 1. https://efabless.com/ https://efabless.com/ 2. https://docs.google.com/document/d/1sMmoCfS5l6Uz8sl9Bk3R32XtsdZmC1Hw6bY9nm6r-PA/edit https://docs.google.com/document/d/1sMmoCfS5l6Uz8sl9Bk3R32Xt...
- mkj 3y ago
  The current tinytapeout 5 adds the first analog support, so I guess it's even a bit more experimental than normal.
- crote 3y ago
  Low IO count, and limited clock speed. It's also unsuitable if you want to keep your design private. Basically, the way this works is that all the different designs are placed on a single chip, with address pins to connect your design to the io pins. This means that everyone participating will have access to all functionality. You essentially buy a single tile in a shared chip. This is also why it can be done so cheaply. Making 500 copies of 1 chip is way easier than 1 copy each of 500 different chips.
- namibj 3y ago
  No analog yet. Also it's a thousand gates, so more like a 4-digit transistor count. For a physical one you pay an extra 50$.

The easiest way to try Skywater PDK is through TinyTapeout: https://tinytapeout.com/ https://tinytapeout.com/ -- highly recommended.

by krasin 3y ago

The easiest way to try Skywater PDK is through TinyTapeout: https://tinytapeout.com/ https://tinytapeout.com/ -- highly recommended.

floxy 3y ago

Am I reading that correctly? For $50 you get ~1,000 transistors worth of die space, and it comes in a package? Are there any other limitations? Full-custom analog design if you wanted?

krasin 3y ago
> Am I reading that correctly? For $50 you get ~1,000 transistors worth of die space, and it comes in a package? That's correct, although it's $100: $50 for the space on the group-run chip and $50 for the physical stuff: the chip and the dev kit. > Are there any other limitations? Yes. Although, fewer and fewer with each next iteration. > Full-custom analog design if you wanted? For analog design, you would need to deal with https://efabless.com/ https://efabless.com/ directly, pay $10k and get 100 QFN chips back with your design some time later. TinyTapeout is digital-only, for now.
- marktangotango 3y ago
  What kind of transistor count can one get with efabless? Ie novice way of asking how complex of a design can be implemented?
  - krasin 3y ago
    efabless gives 10 mm^2 of project space and the 130nm process node allows for 170kgates to 210kgates per mm^2. That translates to 1.7M-2.1M gates per chip. Sources: 1. https://efabless.com/ https://efabless.com/ 2. https://docs.google.com/document/d/1sMmoCfS5l6Uz8sl9Bk3R32XtsdZmC1Hw6bY9nm6r-PA/edit https://docs.google.com/document/d/1sMmoCfS5l6Uz8sl9Bk3R32Xt...
mkj 3y ago
The current tinytapeout 5 adds the first analog support, so I guess it's even a bit more experimental than normal.
crote 3y ago
Low IO count, and limited clock speed. It's also unsuitable if you want to keep your design private. Basically, the way this works is that all the different designs are placed on a single chip, with address pins to connect your design to the io pins. This means that everyone participating will have access to all functionality. You essentially buy a single tile in a shared chip. This is also why it can be done so cheaply. Making 500 copies of 1 chip is way easier than 1 copy each of 500 different chips.
namibj 3y ago
No analog yet. Also it's a thousand gates, so more like a 4-digit transistor count. For a physical one you pay an extra 50$.