9 ms·

Libre Silicon – Free semiconductors for everyone

241 points by pabs3 3y ago

kop316 3y ago
It looks neat, but the process node is 1 um with 3 metal layers. The open Skywater PDK is 130 nm : https://github.com/google/skywater-pdk https://github.com/google/skywater-pdk (though I don't know how reliable the PDK is?)
- tux3 3y ago
  And with Skywater there have been occasional free shuttles (efabless), where they will take your (very small) opensource design and fab it for you on a shared wafer
- krasin 3y ago
  The easiest way to try Skywater PDK is through TinyTapeout: https://tinytapeout.com/ https://tinytapeout.com/ -- highly recommended.
  - floxy 3y ago
    Am I reading that correctly? For $50 you get ~1,000 transistors worth of die space, and it comes in a package? Are there any other limitations? Full-custom analog design if you wanted?
    - krasin 3y ago
      > Am I reading that correctly? For $50 you get ~1,000 transistors worth of die space, and it comes in a package? That's correct, although it's $100: $50 for the space on the group-run chip and $50 for the physical stuff: the chip and the dev kit. > Are there any other limitations? Yes. Although, fewer and fewer with each next iteration. > Full-custom analog design if you wanted? For analog design, you would need to deal with https://efabless.com/ https://efabless.com/ directly, pay $10k and get 100 QFN chips back with your design some time later. TinyTapeout is digital-only, for now.
      - marktangotango 3y ago
        What kind of transistor count can one get with efabless? Ie novice way of asking how complex of a design can be implemented?
        krasin 3y ago
        efabless gives 10 mm^2 of project space and the 130nm process node allows for 170kgates to 210kgates per mm^2. That translates to 1.7M-2.1M gates per chip. Sources: 1. https://efabless.com/ https://efabless.com/ 2. https://docs.google.com/document/d/1sMmoCfS5l6Uz8sl9Bk3R32XtsdZmC1Hw6bY9nm6r-PA/edit https://docs.google.com/document/d/1sMmoCfS5l6Uz8sl9Bk3R32Xt...
    - mkj 3y ago
      The current tinytapeout 5 adds the first analog support, so I guess it's even a bit more experimental than normal.
    - crote 3y ago
      Low IO count, and limited clock speed. It's also unsuitable if you want to keep your design private. Basically, the way this works is that all the different designs are placed on a single chip, with address pins to connect your design to the io pins. This means that everyone participating will have access to all functionality. You essentially buy a single tile in a shared chip. This is also why it can be done so cheaply. Making 500 copies of 1 chip is way easier than 1 copy each of 500 different chips.
    - namibj 3y ago
      No analog yet. Also it's a thousand gates, so more like a 4-digit transistor count. For a physical one you pay an extra 50$.
- sheepshear 3y ago
  Apples and oranges? I don't think Skywater has a recipe book for how to duplicate their process.
  - manxman 3y ago
    Open sourcing the process is what's interesting to me. I wonder how long it will be for this to go from the equivalent of Linus posting on a newsgroup to it displacing TSMC's lead?
    - pjc50 3y ago
      The physical capital requirements are never going away, so that's not going to happen.
    - literalAardvark 3y ago
      The process is somewhat well understood, it's the implementation that has so many levels of perfect process and perfect components that makes tsmc a wonder of the world.
- techdragon 3y ago
  For certain niche applications… this is actually a very good thing. Case in point. Radiation hardness, the ability of a chip to resist the long term effects of radiation damage is highly related to the cross sectional area of the wires. The shiny efficient circuits we make now with their tiny single digit nanometer surface features… are getting to the point where we’re only working with something a few dozen atoms wide. Which means that when high enough energy radiation slams into that part of a circuit, even if all it does is knock a single atom out place or change its atomic structure by neutron or proton capture or splitting it into two or more new atoms… regardless of the result your damaging an appreciable portion of the circuit and It won’t be able to take much before the cumulative effects of exposure to all the radiation degrades the integrated circuit traces and causes eventual failure. A lot of space grade hardware gets around this with having secondary backup hardware or using FPGAs so damaged silicon can be routed around over time. But this gets expensive to use for everything… Having a way to build basic components like power management watchdogs and other critical circuitry that doesn’t require a lot of “smarts” but does need to be reliable… definitely could benefit from this sort of technology.
  - manxman 3y ago
    So in effect our complex technology systems will start to exhibit a digital form of "cancer" from excessive radiation exposure? Perhaps not as in something that replicates or spreads but the effects may not be outright failure but very strange errors that are unpredictable and can have huge knock on effects.
    - techdragon 3y ago
      While it’s similar to the kinds of biological damage that radiation can cause, because the radiation induced damage in DNA does work similarly, the energy from a radiation “hit” breaks bonds in the DNA molecule and causes knock on effects just like in the silicon crystal structures and metalic wires… The better biological analogy for the slow degradation of the integrated circuits due to radiation exposure would probably be heavy metal poisoning because the damage doesn’t typically spread or multiply like DNA damage and/or cancer does. Heavy metal poisoning “accumulates” it’s a slow buildup of something not meant to be there, which causes increasing problems with biological systems, until something is s disrupted by the heavy metal concentration giving a progression of symptoms until enough has built up and you get fatal symptoms. Edit: Simple example/comparison Everyone can (and we sadly have plenty of evidence for this) tolerate a fair bit of lead with an LD50 of 4500 to 5500 mg/kg or and a little bit of mercury with various mercury salts having an LD50 from 6-200 mg/kg, (LD50 is the abbreviation for "lethal dose, 50%", The LD50 for a substance is the dose required to kill half the members of a population.). Two heavy metals, two different levels of "exposure risks". Similarly the metal & doped semiconductors of an integrated circuit have have different sensitives to different kinds of radiation damage. Metal interconnects will tolerate radiation differently than the silicon which is different again to the insulation substrate... A Heavy ion, like a stray iron nucleus, (https://en.wikipedia.org/wiki/HZE_ion https://en.wikipedia.org/wiki/HZE_ion) is going to just dump a lot of energy and screw up a chunk of the atoms in the area around of whatever and wherever it hits, its like the mercury salts, you cant take a lot of hits like that, and fortunately they are statistically rare. Higher energy protons, like cosmic ray protons, can cause proton induced transmutation which will slowly turn the atoms you want into the atoms you don't want, and can cause the silicon transistors themselves to change similar to how we can (and sometimes do) use neutrons to dope semiconductors in the first place (https://en.wikipedia.org/wiki/Doping_(semiconductor)#Neutron_transmutation_doping https://en.wikipedia.org/wiki/Doping_(semiconductor)#Neutron...) Lower energy protons, and high energy electrons and positrons, can also lead to a slow buildup of electrical charges which can cause dielectric breakdowns and other unwanted effects, which can depending on what is involved and how it happens the cause of intermittent or permanent effects. Three different kinds of radiation, three different exposure disks. They are each like different "poisons", and the total exposure, the total absorbed dose of each of them accumulates over time... until one or more of them cause something critical to happen and render the hardware inoperable.
- PoignardAzur 3y ago
  And even then, 130nm is basically the cutting edge from the early 2000s. Cutting edge fabs now are around 3nm. Now, "this node is X nm" has become a marketing term with little correlation to actual transistor size, but from what I've seen, my understanding is you can expect two order of magnitude of difference in density, clock frequency, etc between a 130nm node and a 3 nm one. I suspect you'd get better performance from a cutting-edge FPGA than from one of these open processes. I'm no happy to say that. I want them to win! But it looks like they have a lot of catching up to do.
gorkish 3y ago
These projects are very cool. Just like PCB prototyping and short run manufacturing has advanced massively in the last 10 years, I hope for custom silicon to do the same!
- dvas 3y ago
  Indeed! I recently tried some basic examples from the likes of SiliconCompiler and related projects and found myself reading up and going down the rabbit hole of open-source hardware tooling [0] [0] https://github.com/aolofsson/awesome-opensource-hardware https://github.com/aolofsson/awesome-opensource-hardware
Tabular-Iceberg 3y ago
Why is there a communist flag for traditional Chinese?
- askiiart 3y ago
  It seems to be the Chinese flag now, same as Simplified Chinese. It seems the flag got updated after this comment, then.
  - purpleturnip1 3y ago
    I think the original comment is referring to the PROC flag as communist, which is used for both languages. My impression is that the original commenter wants the ROC/Taiwan flag or Hong Kong flag used instead. (Unless a different flag was used and it was switched, but I find that more unlikely due to quick timing.)
    - askiiart 3y ago
      Ah, sorry about that. I'm pretty uninformed on the China-HK-Taiwan geopoli. I assumed by communist they were referring to the USSR flag. And as for the timing, I agree that such a quick fix is unlikely. I conflated the posts time with the time of the comment, and 15 hours seemed like plenty of time to fix it :P
      - leviathanch 3y ago
        I can explain that, because I made the website. The project started out in Hong Kong, where we've rented out a clean room and I made the first transistors in the lab there. Back then we got some funding from the PRC, because some folks were interested into my argument of the possibility of CIA/NSA hardware back-doors in Chinese hardware... Spying goes both ways, and you gotta pitch your projects depending on the situation. Then however, the pandemic started and folks started setting the campus on fire because of the extradition treaty protests, so we ran out of money and now I'm in Portugal.
floxy 3y ago
Is this still a thing? Last "news" update was from 2018.
- brewdad 3y ago
  And the Roadmap dates from 2021. Guessing it's a dead project.
  - goy 3y ago
    There seems to be a bit of activity at https://gitlab.libresilicon.com/explore/projects https://gitlab.libresilicon.com/explore/projects.
    - leviathanch 3y ago
      Yeah, our project is still ongoing, I'm just too busy for updating the website regularly.
theanonymousone 3y ago
It is quite interesting how many misunderstandings the two meanings of the word "free" have created for the "free" software movement and open source. Maybe time for the community to push for a new word being added to the English dictionary? I have already seen libre being used here and there.
- mtsr 3y ago
  Or maybe the commercial misuse of the word free should be challenged? Generally “included (in the price)”, complimentary (costless but usually limited) or another word better fits the situation. But everyday language around this has gotten very imprecise.
  - theanonymousone 3y ago
    I'm not a native speaker, but is it realy misuse? I frequently see "free of charge", but that's too long for conversational speech. Costless looks like a perfect match, (re-)borrowing from Germanic roots.
    - lionkor 3y ago
      gratis
      - theanonymousone 3y ago
        Yes. That one is coming from the other direction (Latin).
- nabla9 3y ago
  “Free software” means software that respects users' freedom and community. Roughly, it means that the users have the freedom to run, copy, distribute, study, change and improve the software. Thus, “free software” is a matter of liberty, not price.
  - theanonymousone 3y ago
willis936 3y ago
Is anyone making instrumentation and/or isolation amplifiers using this? I don't think it will be able to compete with AD/TI laser trimming resistors in complicated packages, but there's a lot of value in lower performance, inexpensive, radiation tolerant analog ICs.
beeforpork 3y ago
Newest news are from 2018. Roadmap says 'as of 2021'. Any news since then?
deleted 3y ago
[deleted]
xw3098 3y ago
"by charging around 2'000 USD per prototype and letting an engineer wait for months" Is the $2000/prototype really the thing that's keeping the market closed. If we assume it takes one engineer one year to spec/design/test one IC, compared to $2K, it's still going to be that engineer's salary that dominates the cost of the project. Even at non US rates. The thing that's keeping IC design closed is IC design is really hard and tool chain installs are very specific to a particular design. Even if I gave you my design files. It's unlikely you could turn that into an ASIC as is. I'm not saying the tools have to work this way, I'm just saying that today, they do. Even if you're doing a digital design of an ASIC. The verilog is just one piece of what you need.

241 points by pabs3 3y ago

It looks neat, but the process node is 1 um with 3 metal layers. The open Skywater PDK is 130 nm : https://github.com/google/skywater-pdk https://github.com/google/skywater-pdk (though I don't know how reliable the PDK is?)

tux3 3y ago
And with Skywater there have been occasional free shuttles (efabless), where they will take your (very small) opensource design and fab it for you on a shared wafer
krasin 3y ago
The easiest way to try Skywater PDK is through TinyTapeout: https://tinytapeout.com/ https://tinytapeout.com/ -- highly recommended.
- floxy 3y ago
  Am I reading that correctly? For $50 you get ~1,000 transistors worth of die space, and it comes in a package? Are there any other limitations? Full-custom analog design if you wanted?
  - krasin 3y ago
    > Am I reading that correctly? For $50 you get ~1,000 transistors worth of die space, and it comes in a package? That's correct, although it's $100: $50 for the space on the group-run chip and $50 for the physical stuff: the chip and the dev kit. > Are there any other limitations? Yes. Although, fewer and fewer with each next iteration. > Full-custom analog design if you wanted? For analog design, you would need to deal with https://efabless.com/ https://efabless.com/ directly, pay $10k and get 100 QFN chips back with your design some time later. TinyTapeout is digital-only, for now.
    - marktangotango 3y ago
      What kind of transistor count can one get with efabless? Ie novice way of asking how complex of a design can be implemented?
      - krasin 3y ago
        efabless gives 10 mm^2 of project space and the 130nm process node allows for 170kgates to 210kgates per mm^2. That translates to 1.7M-2.1M gates per chip. Sources: 1. https://efabless.com/ https://efabless.com/ 2. https://docs.google.com/document/d/1sMmoCfS5l6Uz8sl9Bk3R32XtsdZmC1Hw6bY9nm6r-PA/edit https://docs.google.com/document/d/1sMmoCfS5l6Uz8sl9Bk3R32Xt...
  - mkj 3y ago
    The current tinytapeout 5 adds the first analog support, so I guess it's even a bit more experimental than normal.
  - crote 3y ago
    Low IO count, and limited clock speed. It's also unsuitable if you want to keep your design private. Basically, the way this works is that all the different designs are placed on a single chip, with address pins to connect your design to the io pins. This means that everyone participating will have access to all functionality. You essentially buy a single tile in a shared chip. This is also why it can be done so cheaply. Making 500 copies of 1 chip is way easier than 1 copy each of 500 different chips.
  - namibj 3y ago
    No analog yet. Also it's a thousand gates, so more like a 4-digit transistor count. For a physical one you pay an extra 50$.
sheepshear 3y ago
Apples and oranges? I don't think Skywater has a recipe book for how to duplicate their process.
- manxman 3y ago
  Open sourcing the process is what's interesting to me. I wonder how long it will be for this to go from the equivalent of Linus posting on a newsgroup to it displacing TSMC's lead?
  - pjc50 3y ago
    The physical capital requirements are never going away, so that's not going to happen.
  - literalAardvark 3y ago
    The process is somewhat well understood, it's the implementation that has so many levels of perfect process and perfect components that makes tsmc a wonder of the world.
techdragon 3y ago
For certain niche applications… this is actually a very good thing. Case in point. Radiation hardness, the ability of a chip to resist the long term effects of radiation damage is highly related to the cross sectional area of the wires. The shiny efficient circuits we make now with their tiny single digit nanometer surface features… are getting to the point where we’re only working with something a few dozen atoms wide. Which means that when high enough energy radiation slams into that part of a circuit, even if all it does is knock a single atom out place or change its atomic structure by neutron or proton capture or splitting it into two or more new atoms… regardless of the result your damaging an appreciable portion of the circuit and It won’t be able to take much before the cumulative effects of exposure to all the radiation degrades the integrated circuit traces and causes eventual failure. A lot of space grade hardware gets around this with having secondary backup hardware or using FPGAs so damaged silicon can be routed around over time. But this gets expensive to use for everything… Having a way to build basic components like power management watchdogs and other critical circuitry that doesn’t require a lot of “smarts” but does need to be reliable… definitely could benefit from this sort of technology.
- manxman 3y ago
  So in effect our complex technology systems will start to exhibit a digital form of "cancer" from excessive radiation exposure? Perhaps not as in something that replicates or spreads but the effects may not be outright failure but very strange errors that are unpredictable and can have huge knock on effects.
  - techdragon 3y ago
    While it’s similar to the kinds of biological damage that radiation can cause, because the radiation induced damage in DNA does work similarly, the energy from a radiation “hit” breaks bonds in the DNA molecule and causes knock on effects just like in the silicon crystal structures and metalic wires… The better biological analogy for the slow degradation of the integrated circuits due to radiation exposure would probably be heavy metal poisoning because the damage doesn’t typically spread or multiply like DNA damage and/or cancer does. Heavy metal poisoning “accumulates” it’s a slow buildup of something not meant to be there, which causes increasing problems with biological systems, until something is s disrupted by the heavy metal concentration giving a progression of symptoms until enough has built up and you get fatal symptoms. Edit: Simple example/comparison Everyone can (and we sadly have plenty of evidence for this) tolerate a fair bit of lead with an LD50 of 4500 to 5500 mg/kg or and a little bit of mercury with various mercury salts having an LD50 from 6-200 mg/kg, (LD50 is the abbreviation for "lethal dose, 50%", The LD50 for a substance is the dose required to kill half the members of a population.). Two heavy metals, two different levels of "exposure risks". Similarly the metal & doped semiconductors of an integrated circuit have have different sensitives to different kinds of radiation damage. Metal interconnects will tolerate radiation differently than the silicon which is different again to the insulation substrate... A Heavy ion, like a stray iron nucleus, (https://en.wikipedia.org/wiki/HZE_ion https://en.wikipedia.org/wiki/HZE_ion) is going to just dump a lot of energy and screw up a chunk of the atoms in the area around of whatever and wherever it hits, its like the mercury salts, you cant take a lot of hits like that, and fortunately they are statistically rare. Higher energy protons, like cosmic ray protons, can cause proton induced transmutation which will slowly turn the atoms you want into the atoms you don't want, and can cause the silicon transistors themselves to change similar to how we can (and sometimes do) use neutrons to dope semiconductors in the first place (https://en.wikipedia.org/wiki/Doping_(semiconductor)#Neutron_transmutation_doping https://en.wikipedia.org/wiki/Doping_(semiconductor)#Neutron...) Lower energy protons, and high energy electrons and positrons, can also lead to a slow buildup of electrical charges which can cause dielectric breakdowns and other unwanted effects, which can depending on what is involved and how it happens the cause of intermittent or permanent effects. Three different kinds of radiation, three different exposure disks. They are each like different "poisons", and the total exposure, the total absorbed dose of each of them accumulates over time... until one or more of them cause something critical to happen and render the hardware inoperable.
PoignardAzur 3y ago
And even then, 130nm is basically the cutting edge from the early 2000s. Cutting edge fabs now are around 3nm. Now, "this node is X nm" has become a marketing term with little correlation to actual transistor size, but from what I've seen, my understanding is you can expect two order of magnitude of difference in density, clock frequency, etc between a 130nm node and a 3 nm one. I suspect you'd get better performance from a cutting-edge FPGA than from one of these open processes. I'm no happy to say that. I want them to win! But it looks like they have a lot of catching up to do.

gorkish 3y ago

These projects are very cool. Just like PCB prototyping and short run manufacturing has advanced massively in the last 10 years, I hope for custom silicon to do the same!

dvas 3y ago
Indeed! I recently tried some basic examples from the likes of SiliconCompiler and related projects and found myself reading up and going down the rabbit hole of open-source hardware tooling [0] [0] https://github.com/aolofsson/awesome-opensource-hardware https://github.com/aolofsson/awesome-opensource-hardware

Tabular-Iceberg 3y ago

Why is there a communist flag for traditional Chinese?

askiiart 3y ago
It seems to be the Chinese flag now, same as Simplified Chinese. It seems the flag got updated after this comment, then.
- purpleturnip1 3y ago
  I think the original comment is referring to the PROC flag as communist, which is used for both languages. My impression is that the original commenter wants the ROC/Taiwan flag or Hong Kong flag used instead. (Unless a different flag was used and it was switched, but I find that more unlikely due to quick timing.)
  - askiiart 3y ago
    Ah, sorry about that. I'm pretty uninformed on the China-HK-Taiwan geopoli. I assumed by communist they were referring to the USSR flag. And as for the timing, I agree that such a quick fix is unlikely. I conflated the posts time with the time of the comment, and 15 hours seemed like plenty of time to fix it :P
    - leviathanch 3y ago
      I can explain that, because I made the website. The project started out in Hong Kong, where we've rented out a clean room and I made the first transistors in the lab there. Back then we got some funding from the PRC, because some folks were interested into my argument of the possibility of CIA/NSA hardware back-doors in Chinese hardware... Spying goes both ways, and you gotta pitch your projects depending on the situation. Then however, the pandemic started and folks started setting the campus on fire because of the extradition treaty protests, so we ran out of money and now I'm in Portugal.

floxy 3y ago

Is this still a thing? Last "news" update was from 2018.

brewdad 3y ago
And the Roadmap dates from 2021. Guessing it's a dead project.
- goy 3y ago
  There seems to be a bit of activity at https://gitlab.libresilicon.com/explore/projects https://gitlab.libresilicon.com/explore/projects.
  - leviathanch 3y ago
    Yeah, our project is still ongoing, I'm just too busy for updating the website regularly.

theanonymousone 3y ago

It is quite interesting how many misunderstandings the two meanings of the word "free" have created for the "free" software movement and open source. Maybe time for the community to push for a new word being added to the English dictionary? I have already seen libre being used here and there.

mtsr 3y ago
Or maybe the commercial misuse of the word free should be challenged? Generally “included (in the price)”, complimentary (costless but usually limited) or another word better fits the situation. But everyday language around this has gotten very imprecise.
- theanonymousone 3y ago
  I'm not a native speaker, but is it realy misuse? I frequently see "free of charge", but that's too long for conversational speech. Costless looks like a perfect match, (re-)borrowing from Germanic roots.
  - lionkor 3y ago
    gratis
    - theanonymousone 3y ago
      Yes. That one is coming from the other direction (Latin).
nabla9 3y ago
“Free software” means software that respects users' freedom and community. Roughly, it means that the users have the freedom to run, copy, distribute, study, change and improve the software. Thus, “free software” is a matter of liberty, not price.
- theanonymousone 3y ago

willis936 3y ago

Is anyone making instrumentation and/or isolation amplifiers using this? I don't think it will be able to compete with AD/TI laser trimming resistors in complicated packages, but there's a lot of value in lower performance, inexpensive, radiation tolerant analog ICs.

beeforpork 3y ago

Newest news are from 2018. Roadmap says 'as of 2021'. Any news since then?

deleted 3y ago

[deleted]

xw3098 3y ago

"by charging around 2'000 USD per prototype and letting an engineer wait for months" Is the $2000/prototype really the thing that's keeping the market closed. If we assume it takes one engineer one year to spec/design/test one IC, compared to $2K, it's still going to be that engineer's salary that dominates the cost of the project. Even at non US rates. The thing that's keeping IC design closed is IC design is really hard and tool chain installs are very specific to a particular design. Even if I gave you my design files. It's unlikely you could turn that into an ASIC as is. I'm not saying the tools have to work this way, I'm just saying that today, they do. Even if you're doing a digital design of an ASIC. The verilog is just one piece of what you need.