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Does someone with more knowledge know why this is not used more for chip production? Is it just new, and TSMC is screwed? What are the downsides? Speed? Edit -

Does someone with more knowledge know why this is not used more for chip production? Is it just new, and TSMC is screwed? What are the downsides? Speed? Edit - thanks for the answers - and yes it would make more sense for ASML to be worried, and TSMC to be happy to not have to use/power/maintain machine that shoot nano-drops of tin with lasers: https://www.trumpf.com/en_US/solutions/applications/euv-lithography/ https://www.trumpf.com/en_US/solutions/applications/euv-lith...

redcap 3y ago
It’s possibly competition for ASML if it works well. If it makes sense for them, TSMC could buy it and use it to keep doing what they’re doing. The key point is that it’s equipment used to manufacture semiconductor devices, and Canon would be competing with ASML rather than TSMC.
mihular 3y ago
Because it's new and TSMC is currently on 3nm? It's great to see competition, though.
KirillPanov 3y ago
Mask lifetime. Last time I heard about this tech (~8 years ago, when it was nowhere near commercial availability) that was the obstacle. Since the mask comes into physical contact with each wafer there is unavoidable wear on the mask with each wafer (actually with each chip). So the mask life is a certain number of chips; then you have to make a new one.
- buildbot 3y ago
  Ah that makes a ton of sense, thank you.
- 0cf8612b2e1e 3y ago
  Presumably, wouldn’t that still be an improvement in throughout? If a mask can be used to make N chips and time to make a mask is less than the time to laser equivalent chips, you have a win.
  - rcxdude 3y ago
    Possibly, but masks are very expensive: a full set for a chip on 3nm photolithography reportedly costs >$40M. That's gotta do a lot of chips to not affect the cost of chips drastically. Maybe the masks for this process are cheaper, though?
- awesomeMilou 3y ago
  Is this really such a big issue compared to laser lithography? Current lithography machines have consumable parts as well (the mirrors below the tin droplets slowly degrade and need to be switched out after a certain amount of use). In addition, isn't the cost of a mask in it's design, not it's production?
  - rcxdude 3y ago
    Masks are also hella expensive: $40M for a set for TSMC's 3nm, apparently.
  - KirillPanov 3y ago
    > In addition, isn't the cost of a mask in it's design, not it's production? They tend to be in the same ballpark. There's a feedback effect: if the maskset gets cheaper you can afford to do shorter product cycles (think "iphone 15.5"), now you've got two masksets each with half the engineer-years devoted to it. This lets you be a bit bolder with the design since the cost of screwing up is lower. If masks get super-expensive then you only do one maskset and you throw more design-hours into making damn sure it's correct, and spend more time adding in "chicken bits" -- ways to turn off features that you screwed up, without ruining the whole chip -- and fallback options or insurance-policy type stuff. So the design cycle will lengthen or shorten if the engineering cost is several times larger or several times smaller than the mask cost. They sort of balance out. Also the design cost is often impossible to define exactly. Blocks from previous designs get reused, so you can't really "charge" the effort it took to design them to just one chip. All the major design houses write a lot their own CAD tools too, and these tools have decade-or-longer lifetimes.
- mathiasgredal 3y ago
  Any reason why you can’t use a traditional lithography machine to create these masks?
  - simne 3y ago
    Chemistry. Etching is not ideal process. In real life it not make ideally vertical hole, but it tends to go V-like or ^-like, so real mask will have artifacts, which are much narrower or much wider than considered, or sometimes could overlap. This could been handled by careful selection of parameters - solution concentration, temperature, pressure, mechanical mixing, etc, but on each step of feature size, it become harder to achieve. I have first education electronics engineer, and I seen broken PCBs, where these artifacts seen by naked eye.
deleted 3y ago
[deleted]
deepnotderp 3y ago
NIL has a) Too high a defect density b) Too poor alignment between layers to directly replace EUV
AChamarthy 3y ago
To continue the patterning roadmap, many techniques were considered back in the day, including 157 litho v. NIL v. EUV v. Direct Self Assembly. For NIL, the biggest issue was defect density...why NIL found a niche in disk drive applications (Toshiba early champion) where you have a lot of redundancy built in Because of EUV's insane cost / complexity, many older litho techniques (NIL, Direct Self Assembly) are making a comeback...NIL is a great option for lower cost patterning applications, like optical/photonic components (Magic Leap etc)

redcap 3y ago

It’s possibly competition for ASML if it works well. If it makes sense for them, TSMC could buy it and use it to keep doing what they’re doing. The key point is that it’s equipment used to manufacture semiconductor devices, and Canon would be competing with ASML rather than TSMC.

mihular 3y ago

Because it's new and TSMC is currently on 3nm? It's great to see competition, though.

KirillPanov 3y ago

Mask lifetime. Last time I heard about this tech (~8 years ago, when it was nowhere near commercial availability) that was the obstacle. Since the mask comes into physical contact with each wafer there is unavoidable wear on the mask with each wafer (actually with each chip). So the mask life is a certain number of chips; then you have to make a new one.

buildbot 3y ago
Ah that makes a ton of sense, thank you.
0cf8612b2e1e 3y ago
Presumably, wouldn’t that still be an improvement in throughout? If a mask can be used to make N chips and time to make a mask is less than the time to laser equivalent chips, you have a win.
- rcxdude 3y ago
  Possibly, but masks are very expensive: a full set for a chip on 3nm photolithography reportedly costs >$40M. That's gotta do a lot of chips to not affect the cost of chips drastically. Maybe the masks for this process are cheaper, though?
awesomeMilou 3y ago
Is this really such a big issue compared to laser lithography? Current lithography machines have consumable parts as well (the mirrors below the tin droplets slowly degrade and need to be switched out after a certain amount of use). In addition, isn't the cost of a mask in it's design, not it's production?
- rcxdude 3y ago
  Masks are also hella expensive: $40M for a set for TSMC's 3nm, apparently.
- KirillPanov 3y ago
  > In addition, isn't the cost of a mask in it's design, not it's production? They tend to be in the same ballpark. There's a feedback effect: if the maskset gets cheaper you can afford to do shorter product cycles (think "iphone 15.5"), now you've got two masksets each with half the engineer-years devoted to it. This lets you be a bit bolder with the design since the cost of screwing up is lower. If masks get super-expensive then you only do one maskset and you throw more design-hours into making damn sure it's correct, and spend more time adding in "chicken bits" -- ways to turn off features that you screwed up, without ruining the whole chip -- and fallback options or insurance-policy type stuff. So the design cycle will lengthen or shorten if the engineering cost is several times larger or several times smaller than the mask cost. They sort of balance out. Also the design cost is often impossible to define exactly. Blocks from previous designs get reused, so you can't really "charge" the effort it took to design them to just one chip. All the major design houses write a lot their own CAD tools too, and these tools have decade-or-longer lifetimes.
mathiasgredal 3y ago
Any reason why you can’t use a traditional lithography machine to create these masks?
- simne 3y ago
  Chemistry. Etching is not ideal process. In real life it not make ideally vertical hole, but it tends to go V-like or ^-like, so real mask will have artifacts, which are much narrower or much wider than considered, or sometimes could overlap. This could been handled by careful selection of parameters - solution concentration, temperature, pressure, mechanical mixing, etc, but on each step of feature size, it become harder to achieve. I have first education electronics engineer, and I seen broken PCBs, where these artifacts seen by naked eye.

deleted 3y ago

[deleted]

deepnotderp 3y ago

NIL has a) Too high a defect density b) Too poor alignment between layers to directly replace EUV

AChamarthy 3y ago

To continue the patterning roadmap, many techniques were considered back in the day, including 157 litho v. NIL v. EUV v. Direct Self Assembly. For NIL, the biggest issue was defect density...why NIL found a niche in disk drive applications (Toshiba early champion) where you have a lot of redundancy built in Because of EUV's insane cost / complexity, many older litho techniques (NIL, Direct Self Assembly) are making a comeback...NIL is a great option for lower cost patterning applications, like optical/photonic components (Magic Leap etc)