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> they make CPUs not GPUs They do make GPUs! They've made some beefy iGPUs in the past, like Broadwell with eDRAM, and they make discrete consumer GPUs like th
by brucethemoose2 3y ago
> they make CPUs not GPUs
They do make GPUs! They've made some beefy iGPUs in the past, like Broadwell with eDRAM, and they make discrete consumer GPUs like the very reasonably priced 16GB Arc A770 now, and they make 128GB server GPUs!
They have some very large GPUs, like Falcon Shores and the Battlemage enthusiast die, on their roadmap.
Also, AI is not always as "core happy" as you would think. For instance, llama.cpp can essentially saturate a DDR5 RAM bus generating tokens on a relatively modest CPU, hence a huge IGP would bring limited benefits in that specific phase. Its also a relatively "serial" operation since the next tokens depend on the previous once, hence its hard to get good GPU utilization without serving multiple clients in parallel. And other "AI chip" designs have diverged from GPUs, like this one:
https://fuse.wikichip.org/news/3256/centaur-new-x86-server-processor-packs-an-ai-punch/ https://fuse.wikichip.org/news/3256/centaur-new-x86-server-p...
> The NCORE itself has a very interesting design. It’s a whopping 32,768-bits wide SIMD VLIW machine.
Its seemingly one giant core!
- Brusco_RF 3y agoWow, you sent me down a serious rabbit hole. That core looks awesome, and the ring bus blew my mind [1]. What is the practical difference between a very wide SIMD processor vs very many single-instruction processors? Is there any? They say this processor is comprised of 16 "slices", each 265B SIMD + 1 MiB cache. Is that different at all from having 16 265B processors? [1] https://en.wikichip.org/wiki/centaur/microarchitectures/cha#Ring https://en.wikichip.org/wiki/centaur/microarchitectures/cha#...
- Dylan16807 3y agoThey all run the same instruction, so I'm not actually sure if the slices matter much.
- brucethemoose2 3y agoA huge SIMD core should have a die area advantage (which in turn gives it other advantages) over a bunch of little processors of the same "width" executing instructions independently. And there is less overhead. In exchange, it can't process different instruction streams simultaneously. It has to perform the same operations over a giant chunk data, or otherwise "waste" the huge SIMD width. Another highlight of this thing: > There is also extensive support for predication with 8 predication registers. The unit is optimized for 8-bit integers (9-bit calculations) From everything I read, NCore would have been a low price LLM monster. Centaur would probably be alive and selling them like hotcakes if they came out with it now, instead if then.
- Brusco_RF 3y agoWould have? What do you mean?
- brucethemoose2 3y agoThis SoC was, unfortunately, never really used, Centaur shut down and IIRC Intel bought the remains. Which is a shame, as it was really cool. And it was x86!