4 ms·

The Tera Computer System (1990)

50 points by twoodfin 3y ago

convolvatron 3y ago
there is an architecture document called 'Principles of Operation' which is the quintessential reference. I can't find it online, but apparently there is a copy at the Computer History Museum. Does anyone know if I can just go to Mountain view?
- jacquesm 3y ago
  I'd contact them first.
aoki 3y ago
I couldn’t figure out why this was here, but I guess it’s because there’s a new barrel processor design: https://news.ycombinator.com/item?id=37315802 https://news.ycombinator.com/item?id=37315802
- dekhn 3y ago
  I mentioned the MTA in a comment on that thread. I assume somebody picked up on that, or independently knew about the architecture. Somebody tried to get me to be a friendly user of MTA when it first came out. I took a look- they pitched it as useful for graph processing rather than simulations- and concluded that the architecture was not going to be competitive with intel in the long term, and ignored it.
- deleted 3y ago
  [deleted]
- jacquesm 3y ago
  Yes, agreed, that's probably why this was posted.
jandrewrogers 3y ago
I remember reading about this in a magazine as a kid when it first came out. I wrote software for the late-generation versions of this architecture (Cray XMT). It really changed the way I thought about software design, and was probably the most fun piece of weird silicon I ever worked on. With a little imagination you could approximate the latency hiding it was doing in silicon in software heuristically, albeit with somewhat different mechanics. For certain kinds of codes it could be exceptionally efficient, graph analysis being a major target. Its fatal flaw was that it was pretty severely memory-bandwidth limited when code was highly optimized, an architectural resource mismatch. There were similar architectures produced by other small companies with ultra-high memory bandwidth but those were designed for a handful of specific customers and not widely marketed. Fun times.
- jacquesm 3y ago
  Any von Neumann inspired architecture is going to resemble looking at your data through a keyhole and trying to cram as much data through that keyhole as you can. There is an obvious solution to that but unfortunately it does not generalize well and it would likely be very hard to program for. This bottle-neck is what we spend a very large fraction of our time dealing with. Crack that one and you will be more famous than Bill Gates. I've seen some really nice attempts at computing fabrics but none that were able to grab any kind of market share, there was a post the other day about another Barrel Processor (https://news.ycombinator.com/item?id=37315802 https://news.ycombinator.com/item?id=37315802) which is probably why this one is posted now. But Barrel processors are still limited by the die size and need regular processors to deal with the non parallelizable parts of the code, they're a different point on the general cpu <-> specialized hardware continuum that works well for certain problems. Chances are that as we get closer to the limits of Moore's law that we will see a revival of such exotic architectures because they will be the only way forward to get more computing power. Especially workloads like AI and graph analysis could well benefit from this because the hardware and the data model overlap quite nicely.
  - navaati 3y ago
    > There is an obvious solution to that but I'm feeling a bit dense today and it's not obvious to me. Please do tell what that solution is and why it doesn't generalize :).

50 points by twoodfin 3y ago

there is an architecture document called 'Principles of Operation' which is the quintessential reference. I can't find it online, but apparently there is a copy at the Computer History Museum. Does anyone know if I can just go to Mountain view?

jacquesm 3y ago
I'd contact them first.

aoki 3y ago

I couldn’t figure out why this was here, but I guess it’s because there’s a new barrel processor design: https://news.ycombinator.com/item?id=37315802 https://news.ycombinator.com/item?id=37315802

dekhn 3y ago
I mentioned the MTA in a comment on that thread. I assume somebody picked up on that, or independently knew about the architecture. Somebody tried to get me to be a friendly user of MTA when it first came out. I took a look- they pitched it as useful for graph processing rather than simulations- and concluded that the architecture was not going to be competitive with intel in the long term, and ignored it.
deleted 3y ago
[deleted]
jacquesm 3y ago
Yes, agreed, that's probably why this was posted.

jandrewrogers 3y ago

I remember reading about this in a magazine as a kid when it first came out. I wrote software for the late-generation versions of this architecture (Cray XMT). It really changed the way I thought about software design, and was probably the most fun piece of weird silicon I ever worked on. With a little imagination you could approximate the latency hiding it was doing in silicon in software heuristically, albeit with somewhat different mechanics. For certain kinds of codes it could be exceptionally efficient, graph analysis being a major target. Its fatal flaw was that it was pretty severely memory-bandwidth limited when code was highly optimized, an architectural resource mismatch. There were similar architectures produced by other small companies with ultra-high memory bandwidth but those were designed for a handful of specific customers and not widely marketed. Fun times.

jacquesm 3y ago
Any von Neumann inspired architecture is going to resemble looking at your data through a keyhole and trying to cram as much data through that keyhole as you can. There is an obvious solution to that but unfortunately it does not generalize well and it would likely be very hard to program for. This bottle-neck is what we spend a very large fraction of our time dealing with. Crack that one and you will be more famous than Bill Gates. I've seen some really nice attempts at computing fabrics but none that were able to grab any kind of market share, there was a post the other day about another Barrel Processor (https://news.ycombinator.com/item?id=37315802 https://news.ycombinator.com/item?id=37315802) which is probably why this one is posted now. But Barrel processors are still limited by the die size and need regular processors to deal with the non parallelizable parts of the code, they're a different point on the general cpu <-> specialized hardware continuum that works well for certain problems. Chances are that as we get closer to the limits of Moore's law that we will see a revival of such exotic architectures because they will be the only way forward to get more computing power. Especially workloads like AI and graph analysis could well benefit from this because the hardware and the data model overlap quite nicely.
- navaati 3y ago
  > There is an obvious solution to that but I'm feeling a bit dense today and it's not obvious to me. Please do tell what that solution is and why it doesn't generalize :).