I once saw a professor show me their latest taped out CPU (multi project wafer of course) and it had one tiny core that is supposed to control the wake-up of th

I once saw a professor show me their latest taped out CPU (multi project wafer of course) and it had one tiny core that is supposed to control the wake-up of the larger processor. The sleep controller has no memory and is a thin slice that is barely visible. Meanwhile the primary processor is much larger but it too is completely dwarfed by the memory it is being surrounded by. The idea of throwing out parts of the ALU is ridiculous. The only situation where this would make sense is in some kind of processing in memory situation where your logic process does not permit large CPUs and you expect to have hundreds of cores per chip with multiple chips on a single DIMM.